i.MXRT1050

NXP's iMXRT105x family features a Cortex-M7 core without internal flash. The device supports both, QSPI and HyperFlash through a so called FLEXSPI controller. NXP's official evaluation board, the MIMXRT1050 EVK is shipped with a 512Mbit Hyper Flash device by default. Alternatively, a QSPI flash can be mounted but several board modifications (removing the hyper flash, adding resistors, etc...) are required. As both flashes are accessed through the same memory mapped address space, either the HyperFlash or the QSPI flash RAMCode needs to be used for memory accesses to this area. By default, the HyperFlash RAMCode is enabled

Hyper Flash

By default, the Hyper Flash algorithm is selected by the J-Link software. No additional steps are required.