Difference between revisions of "i.MXRT1060"

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(Created page with "__TOC__ = Flash Programming = NXP's iMXRT105x family features a Cortex-M7 core without internal flash but with support for QSPI and HyperFlash through a so called FLEXSPI co...")
 
(Flash Programming)
 
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This article coverst the NXP i.MXRT1060 family devices.
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As for all i.MXRT10xx devices, JTAG is not active per default. Instead SWD can be used.
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To activate JTAG on this target device eFuses must be set. For more information see the corresponding target reference manual.
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__TOC__
 
__TOC__
 
   
 
= Flash Programming =
 
= Flash Programming =
NXP's iMXRT105x family features a Cortex-M7 core without internal flash but with support for QSPI and HyperFlash through a so called FLEXSPI controller. NXP's official evaluation board, the ''MIMXRT1050 EVK'' is shipped with a 512Mbit Hyper Flash device by default. Alternatively, a QSPI flash can be mounted but several board modifications (removing the hyper flash, adding resistors, etc...) are required. As both flashes are accessed through the same memory mapped address space, either the HyperFlash or the QSPI flash RAMCode needs to be used for memory accesses to this area. Please find below further information how to enable the desired flash algorithm (RAMCode). Official flash programming support has been added in J-Link software version V6.31d.
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NXP's iMXRT106x family features a Cortex-M7 core without internal flash but with support for QSPI and HyperFlash through a so called FLEXSPI controller. NXP's official evaluation board, the ''MIMXRT1050 EVK'' is shipped with a 512Mbit Hyper Flash device by default. Alternatively, a QSPI flash can be mounted but several board modifications (removing the hyper flash, adding resistors, etc...) are required. As both flashes are accessed through the same memory mapped address space, either the HyperFlash or the QSPI flash RAMCode needs to be used for memory accesses to this area. Please find below further information how to select the desired flash loader. Official flash programming support has been added in J-Link software version V6.31d.
== Minimum requirements ==
 
* Min. J-Link software version '''V6.40 (release)''' is required. Later versions will also work. Earlier versions do not support flash programming on this device.
 
   
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Resetting the device in the init steps may lead to problems when programming in standalone mode.
== Enable Flashloader ==
 
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===QSPI Flash===
 
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== Requirements ==
By default, the QSPI Flash algorithm is selected in the J-Link software. No additional steps are required.
 
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* Min. J-Link software version '''V6.40 (release)''' is required. Later versions will also work. Earlier versions do not support flash programming on this device.
   
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In order to be able to program a i.MXRT106x device, we expect that the first 0x10000 bytes of the RAM are configured to execute instructions from.
===Hyper Flash===
 
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The purpose of the RAM banks can be configured through the FlexRAM-controller.
To enable the Hyperflash support in the J-Link software, the JLinkDevices.xml needs to be modified.
 
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In case you have a different configuration of the RAM banks, which is not compatible with our assumption, please contact us.
For further information regarding the JLinkDevices.xml, please refer to the ''Open Flashloader'' chapter in the J-Link User Manual (UM08001).
 
   
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== Available flash loaders ==
#Open the JLinkDevices.xml (e.g. '''C:\Program Files (x86)\SEGGER\JLink_V640\JLinkDevices.xml'''
 
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J-Link comes with multiple selectable FLEXSPI flashloaders for i.MXRT1060 devices. There are [[J-Link_Multiple_Flashloader#Command_line_parameter|several options]] to select a different loader than the default one.
#Search the desired iMXRT <Device> entry
 
#Change ''Loader="Devices/NXP/iMXRT106x/NXP_iMXRT106x_QSPI.elf"'' to ''Loader="Devices/NXP/iMXRT105x/NXP_iMXRT105x_HyperFlash.elf"'' Yes you need to select the HyperFlash Loader from iMXRT105x, iMXRT105x and iMXRT106x use the same Hyperflash configuration.
 
#Save the JLinkDevices.xml
 
From now, the J-Link software uses the HyperFlash RAMCode instead of the QSPI RAMCode for the flash download.
 
   
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{| class="wikitable"
'''NOTE:''' Please note that several hardware modifications needs to be done on the evaluation board to enable Hyperflash programming / booting from Hyperflash. For further information regarding this, please refer to NXPs board user manual.
 
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|-
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! Loader name !! Pin configuration !! Notes
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|-
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| HyperFlash || FLEXSPIB_DATA03 = GPIO_SD_B1_00<br>FLEXSPIB_DATA02 = GPIO_SD_B1_01<br>FLEXSPIB_DATA01 = GPIO_SD_B1_02<br>FLEXSPIB_DATA00 = GPIO_SD_B1_03<br>FLEXSPIB_SCLK = GPIO_SD_B1_04<br>FLEXSPIA_DQS = GPIO_SD_B1_05<br>FLEXSPIA_SS0_B = GPIO_SD_B1_06<br>FLEXSPIA_SCLK = GPIO_SD_B1_07<br>FLEXSPIA_DATA00 = GPIO_SD_B1_08<br>FLEXSPIA_DATA01 = GPIO_SD_B1_09<br>FLEXSPIA_DATA02 = GPIO_SD_B1_10<br>FLEXSPIA_DATA03 = GPIO_SD_B1_11 || Default loader
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|-
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| QSPI || FLEXSPIB_DATA03 = GPIO_SD_B1_00<br>FLEXSPIB_DATA02 = GPIO_SD_B1_01<br>FLEXSPIB_DATA01 = GPIO_SD_B1_02<br>FLEXSPIB_DATA00 = GPIO_SD_B1_03<br>FLEXSPIB_SCLK = GPIO_SD_B1_04<br>FLEXSPIA_DQS = GPIO_SD_B1_05<br>FLEXSPIA_SS0_B = GPIO_SD_B1_06<br>FLEXSPIA_SCLK = GPIO_SD_B1_07<br>FLEXSPIA_DATA00 = GPIO_SD_B1_08<br>FLEXSPIA_DATA01 = GPIO_SD_B1_09<br>FLEXSPIA_DATA02 = GPIO_SD_B1_10<br>FLEXSPIA_DATA03 = GPIO_SD_B1_11 || -
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|}
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'''NOTE:''' Please note that several hardware modifications needs to be done on the evaluation board to enable HyperFlash programming / booting from HyperFlash. For further information regarding this, please refer to NXPs board user manual.

Latest revision as of 10:58, 31 August 2022

This article coverst the NXP i.MXRT1060 family devices. As for all i.MXRT10xx devices, JTAG is not active per default. Instead SWD can be used. To activate JTAG on this target device eFuses must be set. For more information see the corresponding target reference manual.

Flash Programming

NXP's iMXRT106x family features a Cortex-M7 core without internal flash but with support for QSPI and HyperFlash through a so called FLEXSPI controller. NXP's official evaluation board, the MIMXRT1050 EVK is shipped with a 512Mbit Hyper Flash device by default. Alternatively, a QSPI flash can be mounted but several board modifications (removing the hyper flash, adding resistors, etc...) are required. As both flashes are accessed through the same memory mapped address space, either the HyperFlash or the QSPI flash RAMCode needs to be used for memory accesses to this area. Please find below further information how to select the desired flash loader. Official flash programming support has been added in J-Link software version V6.31d.

Resetting the device in the init steps may lead to problems when programming in standalone mode.

Requirements

  • Min. J-Link software version V6.40 (release) is required. Later versions will also work. Earlier versions do not support flash programming on this device.

In order to be able to program a i.MXRT106x device, we expect that the first 0x10000 bytes of the RAM are configured to execute instructions from. The purpose of the RAM banks can be configured through the FlexRAM-controller. In case you have a different configuration of the RAM banks, which is not compatible with our assumption, please contact us.

Available flash loaders

J-Link comes with multiple selectable FLEXSPI flashloaders for i.MXRT1060 devices. There are several options to select a different loader than the default one.

Loader name Pin configuration Notes
HyperFlash FLEXSPIB_DATA03 = GPIO_SD_B1_00
FLEXSPIB_DATA02 = GPIO_SD_B1_01
FLEXSPIB_DATA01 = GPIO_SD_B1_02
FLEXSPIB_DATA00 = GPIO_SD_B1_03
FLEXSPIB_SCLK = GPIO_SD_B1_04
FLEXSPIA_DQS = GPIO_SD_B1_05
FLEXSPIA_SS0_B = GPIO_SD_B1_06
FLEXSPIA_SCLK = GPIO_SD_B1_07
FLEXSPIA_DATA00 = GPIO_SD_B1_08
FLEXSPIA_DATA01 = GPIO_SD_B1_09
FLEXSPIA_DATA02 = GPIO_SD_B1_10
FLEXSPIA_DATA03 = GPIO_SD_B1_11
Default loader
QSPI FLEXSPIB_DATA03 = GPIO_SD_B1_00
FLEXSPIB_DATA02 = GPIO_SD_B1_01
FLEXSPIB_DATA01 = GPIO_SD_B1_02
FLEXSPIB_DATA00 = GPIO_SD_B1_03
FLEXSPIB_SCLK = GPIO_SD_B1_04
FLEXSPIA_DQS = GPIO_SD_B1_05
FLEXSPIA_SS0_B = GPIO_SD_B1_06
FLEXSPIA_SCLK = GPIO_SD_B1_07
FLEXSPIA_DATA00 = GPIO_SD_B1_08
FLEXSPIA_DATA01 = GPIO_SD_B1_09
FLEXSPIA_DATA02 = GPIO_SD_B1_10
FLEXSPIA_DATA03 = GPIO_SD_B1_11
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NOTE: Please note that several hardware modifications needs to be done on the evaluation board to enable HyperFlash programming / booting from HyperFlash. For further information regarding this, please refer to NXPs board user manual.