Difference between revisions of "NXP i.MX 8M Nano"
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| − | The '''NXP i.MX 8M Nano''' is an embedded |
+ | The '''NXP i.MX 8M Nano''' is an embedded multi-core processor consisting of one Cortex-M7 and four Cortex-A53. |
== Debugging == |
== Debugging == |
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| − | J-Link supports debugging for the Cortex-M4. During connect the |
+ | J-Link supports debugging for the Cortex-M4. During connect the M7 is set to execute an endless loop at 0x1FFE0000 (TCML RAM) and afterwards halted. |
=== Reset === |
=== Reset === |
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Revision as of 17:34, 21 March 2024
Contents
The NXP i.MX 8M Nano is an embedded multi-core processor consisting of one Cortex-M7 and four Cortex-A53.
Debugging
J-Link supports debugging for the Cortex-M4. During connect the M7 is set to execute an endless loop at 0x1FFE0000 (TCML RAM) and afterwards halted.
Reset
J-Link currently does not support device reset.
