ArteryTek AT32F43x

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ArteryTek AT32F43x are Cortex-M4 based MCUs

Flash Banks

Internal Flash

Flash Bank Base address Size J-Link Support
Internal flash 0x08000000 Up to 4096 KB YES.png
User data 0x1FFFC000 4 KB YES.png

QSPI Flash

QSPI flash programming requires special handling compared to internal flash. For more information about this, please see the QSPI Flash Programming Support article.
J-Link supports multiple pin configurations for AT32F43x. The default loader is marked in bold.

Device Base address Maximum size Supported pin configuration


0x90000000 Up to 64 MB
  • CLK@PF10 CS@PG6 IO0@PF9 IO1@PF8 IO2@PF7 IO3_@PF6

Watchdog Handling

  • The watchdog is fed during flash programming.

Device Specific Handling


  • On Connect, protection level is checked. For further information regarding this, please click here.


  • The device uses normal Cortex-M reset, no special handling necessary, like described here.

Evaluation Boards

Example Application