CYT2B7 (TVII-B-E-1M) is a subfamily of Traveo II microcontrollers containing a Cortex M4 and Cortex M0+ CPU.
The CYT2B7 family features 2 x 64 KB = 128 KB of SRAM located at 0x08000000. The first 2 KB are reserved for internal usage and may not be used.
Flash memory layout
The CYT2B7 series devices have 1088 KiB Code flash and a 96 KiB Work flash. Both flashes are split in an area of large sectors and an area of small sectors.
|Flash||Start adress||End adress||Sector size||Sector count||Total size|
|Code flash large area||0x10000000||0x100EFFFF||32 KiB||30||960 KiB|
|Code flash small area||0x100F0000||0x1010FFFF||8 KiB||16||128 KiB|
|Work flash large area||0x14000000||0x14011FFF||2 KiB||36||72 KiB|
|Work flash small area||0x14012000||0x14017FFF||128 B||192||24 KiB|