The K32W0x device family from NXP are ultra-low power, high performance Cortex-M4 based wireless microcontrollers.
On-Chip Memory Regions
The K32W0x series devices have an internal flash of 640 KiB size. The K32W041AM device has an additional 1MiB internal QSPI flash built in.
|0x00000000 - 0x0009FFFF
|K32W041, K32W041A, K32W041AM, K32W061
|Internal QSPI flash
|0x00000000 - 0x000FFFFF
The internal flash is divided into 3 different regions:
- Reserved by flash controller (0x9F000 - 0x9FFFF)
- Reserved by boot code (0x9DE00 - 0x9EFFF)
- Application space (0x00000 - 0x9DDFF)
For now, the J-Link supports the application space, only.
Vector Table Remap
The first 512 bytes of the device (0x0000 - 0x01FF) can be mapped to flash, ROM or RAM. When using the J-Link flashloader, this region is mapped to flash. This is done on purpose as the device does not provide a mirror address for the first 512 bytes of flash thus without remapping, the J-Link could not program the first 512 bytes.
The flash seems to be ECC protected. Read fails for sectors with invalid ECC (e.g. erased sectors). In order to prevent errors when reading empty sectors, the DLL do neither perform a blank check nor a compare of the flash content before programming.
Internal QSPI Flash
The built in internal QSPI flash of the K32W041AM has a size of 1 MiB. The K32W041AM supports SPI flashes of sizes up to 4 MiB.
The device has a ROM code which needs to be run after reset. The J-Link halts the MCU after executing the ROM code but before starting the application.
- NXP K32W041AM evaluation board: https://wiki.segger.com/NXP_K32W041AM
- NXP K32W041AM evaluation board: https://wiki.segger.com/NXP_K32W041AM#Example_Project