ST STM32U0
The ST STM32U0 series are 32-bit ultra low power microcontrollers based on the ARM Cortex-M0+ processor.
Contents
Flash Banks
Internal Flash
| Device | Flash bank | Base address | Size | J-Link Support |
|---|---|---|---|---|
| STM32U0xxx4 | Main Flash | 0x08000000 | 16 KB | 
|
| STM32U0xxx6 | Main Flash | 0x08000000 | 32 KB |
|
| STM32U0xxx8 | Main Flash | 0x08000000 | 64 KB |
|
| STM32U0xxxB | Main Flash | 0x08000000 | 128 KB |
|
| STM32U0xxxC | Main Flash | 0x08000000 | 256 KB |
|
| All | OTP | 0x1FFF6800 | 1 KB |
|
Watchdog Handling
- The device has a watchdog IWDG.
- The watchdog is fed during flash programming and stopped during halt.
Reset
For the STM32U0 devices, the Cortex-M default reset strategy is used.
Device Specific Handling
Flash write protection is controlled through option bytes. To remove flash write protection, the FLASH_WRP1AR and FLASH_WRP1AR registers must be programmed accordingly.
Option byte programming
Option byte programming is implemented in Device Provisioner utility: https://wiki.segger.com/ST_STM32U0_Option_Bytes_Programming.
Securing/unsecuring the device
RDP regression, RDP regression with password, OEM keys programming/removing features are implemented in Device Provisioner utility: https://wiki.segger.com/ST_STM32U0_Option_Bytes_Programming.
Evaluation Boards
- ST NUCLEO-U031R8 evaluation board: SNUCLEO-U031R8
