Difference between revisions of "Geehy APM32F0xx"

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__TOC__
  
__TOC__
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The Geehy APM32F0xx are Cortex-M0+ based MCUs.
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The Geehy APM32F0xx are Cortex-M0+ based MCUs. Following information also applies for devices of the Geehy APM32A0xx family.
   
 
==Internal Flash==
  
==Internal Flash==
 
===Supported Regions===
  
===Supported Regions===
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The internal flash is divided into 2 to 3 different regions:
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The internal flash is divided into 3 different regions:
   
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*Main storage area with up to 512KB
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*Main storage area starting at 0x08000000 with up to 512KB (256KB for APM32A0xx)
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*Option byte area with up to 2KB
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*Reserved bootloader area starting at 0x1FFFD800 with up to 8KB
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*Option byte area starting at 0x1FFFF800 with 16 bytes
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*Reserved bootloader area (all but APM32F003)
  
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  +
APM32F003 devices do not have a reserved bootloader area:
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*Main storage area starting at 0x0 with up to 32KB
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*Option byte area starting at 0x00020400 with 16 bytes
   
 
For now, the J-Link supports the main storage and option byte area.
  
For now, the J-Link supports the main storage and option byte area.
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! Address !! [31:24] !! [23:16] !! [15:08] !! [07:00]
  
! Address !! [31:24] !! [23:16] !! [15:08] !! [07:00]
 
|-
  
|-
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| 0x1FFFF800 || nUOB || UOB || nREADPROT || READPROT
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| 0x00020400 || nUOB || UOB || nREADPROT || READPROT
 
|-
  
|-
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| 0x1FFFF804 || nData1 || Data1 || nData0 || Data0
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| 0x00020404 || nData1 || Data1 || nData0 || Data0
 
|-
  
|-
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| 0x1FFFF808 || nWRP1 || WRP1 || nWRP0 || WRP0
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| 0x00020408 || nWRP1 || WRP1 || nWRP0 || WRP0
 
|-
  
|-
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| 0x1FFFF80C || nWRP3 || WRP3 || nWRP2 || WRP2
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| 0x0002040C || nWRP3 || WRP3 || nWRP2 || WRP2
 
|-
  
|-
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| 0x1FFFF810 || --- || --- || nAFR|| AFR
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| 0x00020410 || --- || --- || nAFR|| AFR
 
|}
  
|}
   

Latest revision as of 10:14, 28 March 2023

The Geehy APM32F0xx are Cortex-M0+ based MCUs. Following information also applies for devices of the Geehy APM32A0xx family.

Internal Flash

Supported Regions

The internal flash is divided into 3 different regions:

  • Main storage area starting at 0x08000000 with up to 512KB (256KB for APM32A0xx)
  • Reserved bootloader area starting at 0x1FFFD800 with up to 8KB
  • Option byte area starting at 0x1FFFF800 with 16 bytes

APM32F003 devices do not have a reserved bootloader area:

  • Main storage area starting at 0x0 with up to 32KB
  • Option byte area starting at 0x00020400 with 16 bytes

For now, the J-Link supports the main storage and option byte area.

Option Byte Programming

The APM32F0 series devices provide some option bytes which allow some "permanent" configuration as well as readout protection for the device. The option bytes become effective after a reset, or, if the read protection is set while a debugger is still connected through JTAG/SWD, become effective after a power-on-reset. The sequence, to program the option bytes consists of multiple read / write accesses to special function registers of the APM32F0 MCU.

The option byte area consists of the actual option bytes and their corresponding complementary bytes. All complementary bytes are automatically set when writing the option bytes.

The following tables describes the structure of the option byte sector:

APM32F00x
Address [31:24] [23:16] [15:08] [07:00]
0x00020400 nUOB UOB nREADPROT READPROT
0x00020404 nData1 Data1 nData0 Data0
0x00020408 nWRP1 WRP1 nWRP0 WRP0
0x0002040C nWRP3 WRP3 nWRP2 WRP2
0x00020410 --- --- nAFR AFR
APM32F0xx
Address [31:24] [23:16] [15:08] [07:00]
0x1FFFF800 nUOB UOB nREADPROT READPROT
0x1FFFF804 nData1 Data1 nData0 Data0
0x1FFFF808 nWRP1 WRP1 nWRP0 WRP0
0x1FFFF80C nWRP3 WRP3 nWRP2 WRP2
Note:

Writing a value of 0xFF inside READPROT will read-protect the APM32F0. In order to keep the device unprotected you have to write the correct key value to READPROT.

  • APM32F00x = 0xA5
  • APM32F0xx = 0xAA

Reset

No device specific reset is necessary. The normal Cortex-M reset is performed.

See here for more information: https://wiki.segger.com/J-Link_Reset_Strategies#Type_0:_Normal

Evaluation Boards

Example Application

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