Difference between revisions of "GigaDevice GD32"

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In case that J-Link fails to connect to the device (usually caused by a low-power state of the MCU),
  
In case that J-Link fails to connect to the device (usually caused by a low-power state of the MCU),
 
J-Link will try to connect to the device under reset to make debugging possible.
  
J-Link will try to connect to the device under reset to make debugging possible.
  +
  +
  +
== MCU Security ==
  +
  +
=== Disabling readout protection ===
  +
==== J-Link Commander and J-Flash ====
  +
J-Link Commander and J-Flash automatically detect secured STM32 devices and ask the user if it should be unlocked.
  +
  +
==== Flasher standalone mode ====
  +
In order to unlock a STM32 device in stand-alone mode, the unlock sequence is executed automatically if a secured device is detected.
  +
  +
=== Enabling readout protection ===
  +
All provided J-Link Commander command files set the protection level to low (OB_SPC = 0x11 / OB_SPC_N = 0xEE).
  +
In order to set protection level to high, the value "0x11" needs to be changed to "0xCC" and "0xEE" to "0x33".
  +
Please note that protection level high is permanent and can neither be reverted by SEGGER nor by GigaDevice.
  +
  +
=== Device Table ===
  +
{| class="wikitable"
  +
|+GD32 series overview
  +
! Sub-Family
  +
! Core
  +
! J-Link Commander and J-Flash:<br>native Unlock support
  +
! J-Link Commander:<br>Lock via [[J-Link_Commander#Using_J-Link_Command_Files | command file]]
  +
! STM32 Unlock tool support
  +
! J-Flash:<br>Unlock project
  +
! J-Flash<ref>For further information regarding native support in J-Flash and why native support is no longer implemented for new devices, please refer to this article: [[MCU_Security_Options]]</ref>:<br>native lock support
  +
! J-Flash:<br>Lock project
  +
|-
  +
|[[ST STM32C0]]
  +
|Cortex-M0
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32C0_Lock.jlink|STM32C0_Lock.jlink]]
  +
|scope="col" style="text-align:center" | {{NO}}
  +
|[[:Media:STM32C0_Unlock.jflash|STM32C0_Unlock.jflash]]
  +
|scope="col" style="text-align:center" | {{NO}}
  +
|[[:Media:STM32C0_Lock.jflash|STM32C0_Lock.jflash]]
  +
|-
  +
|[[ST STM32F0]]
  +
|Cortex-M0
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32F0_Lock.jlink | STM32F0_Lock.jlink]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32F0_Unlock.jflash|STM32F0_Unlock.jflash]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32F0_Lock.jflash|STM32F0_Lock.jflash]]
  +
|-
  +
|[[ST STM32F1]]
  +
|Cortex-M3
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32F1_Lock.jlink|STM32F1_Lock.jlink]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32F1_Unlock.jflash|STM32F1_Unlock.jflash]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32F1_Lock.jflash|STM32F1_Lock.jflash]]
  +
|-
  +
|[[ST STM32F2]]
  +
|Cortex-M3
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32F2_Lock.jlink|STM32F2_Lock.jlink]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32F2_Unlock.jflash|STM32F2_Unlock.jflash]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32F2_Lock.jflash|STM32F2_Lock.jflash]]
  +
|-
  +
|[[ST STM32F3]]
  +
|Cortex-M4
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32F3_Lock.jlink|STM32F3_Lock.jlink]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32F3_Unlock.jflash|STM32F3_Unlock.jflash]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32F3_Lock.jflash|STM32F3_Lock.jflash]]
  +
|-
  +
|[[ST STM32F4]]
  +
|Cortex-M4
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32F4_Lock.jlink|STM32F4_Lock.jlink]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32F4_Unlock.jflash|STM32F4_Unlock.jflash]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32F4_Lock.jflash|STM32F4_Lock.jflash]]
  +
|-
  +
|[[ST STM32F7]]
  +
|Cortex-M7
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32F7_Lock.jlink|STM32F7_Lock.jlink]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32F7_Unlock.jflash|STM32F7_Unlock.jflash]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32F7_Lock.jflash|STM32F7_Lock.jflash]]
  +
|-
  +
|[[ST STM32G0]]
  +
|Cortex-M0+
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32G0_Lock.jlink | STM32G0_Lock.jlink]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32G0_Unlock.jflash|STM32G0_Unlock.jflash]]
  +
|scope="col" style="text-align:center" | {{NO}}
  +
|[[:Media:STM32G0_Lock.jflash|STM32G0_Lock.jflash]]
  +
|-
  +
|[[ST STM32G4]]
  +
|Cortex-M4
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32G4_Lock.jlink | STM32G4_Lock.jlink]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32G4_Unlock.jflash|STM32G4_Unlock.jflash]]
  +
|scope="col" style="text-align:center" | {{NO}}
  +
|[[:Media:STM32G4_Lock.jflash|STM32G4_Lock.jflash]]
  +
|-
  +
|[[ST STM32H7]]
  +
|Cortex-M7
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32H7_Lock.jlink|STM32H7_Lock.jlink]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32H7_Unlock.jflash|STM32H7_Unlock.jflash]]
  +
|scope="col" style="text-align:center" | {{NO}}
  +
|[[:Media:STM32H7_Lock.jflash|STM32H7_Lock.jflash]]
  +
|-
  +
|[[ST STM32L0]]
  +
|Cortex-M0
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32L0_Lock.jlink|STM32L0_Lock.jlink]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32L0_Unlock.jflash|STM32L0_Unlock.jflash]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32L0_Lock.jflash|STM32L0_Lock.jflash]]
  +
|-
  +
|[[ST STM32L1]]
  +
|Cortex-M3
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32L1_Lock.jlink|STM32L1_Lock.jlink]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32L1_Unlock.jflash|STM32L1_Unlock.jflash]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32L1_Lock.jflash|STM32L1_Lock.jflash]]
  +
|-
  +
|[[ST STM32L4]]
  +
|Cortex-M4
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32L4_Lock.jlink|STM32L4_Lock.jlink]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32L4_Unlock.jflash|STM32L4_Unlock.jflash]]
  +
|scope="col" style="text-align:center" | {{NO}}
  +
|[[:Media:STM32L4_Lock.jflash|STM32L4_Lock.jflash]]
  +
|-
  +
|[[ST STM32L5]]
  +
|Cortex-M33
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32L5_Lock.jlink|STM32L5_Lock.jlink]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32L5_Unlock.jflash|STM32L5_Unlock.jflash]]
  +
|scope="col" style="text-align:center" | {{NO}}
  +
|[[:Media:STM32L5_Lock.jflash|STM32L5_Lock.jflash]]
  +
|-
  +
|[[ST STM32U5]]
  +
|Cortex-M33
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32U5_Lock.jlink|STM32U5_Lock.jlink]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32U5_Unlock.jflash|STM32U5_Unlock.jflash]]
  +
|scope="col" style="text-align:center" | {{NO}}
  +
|[[:Media:STM32U5_Lock.jflash|STM32U5_Lock.jflash]]
  +
|-
  +
|[[ST STM32WB]]
  +
|Cortex-M4
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32WB_Lock.jlink|STM32WB_Lock.jlink]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32WB_Unlock.jflash|STM32WB_Unlock.jflash]]
  +
|scope="col" style="text-align:center" | {{NO}}
  +
|[[:Media:STM32WB_Lock.jflash|STM32WB_Lock.jflash]]
  +
|-
  +
|[[ST STM32WBA]]
  +
|Cortex-M3
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32WBA_Lock.jlink|STM32WBA_Lock.jlink]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32WBA_Unlock.jflash|STM32WBA_Unlock.jflash]]
  +
|scope="col" style="text-align:center" | {{NO}}
  +
|[[:Media:STM32WBA_Lock.jflash|STM32WBA_Lock.jflash]]
  +
  +
|-
  +
|[[ST STM32WL]]
  +
|Cortex-M4
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32WL_Lock.jlink|STM32WL_Lock.jlink]]
  +
|scope="col" style="text-align:center" | {{YES}}
  +
|[[:Media:STM32WL_Unlock.jflash|STM32WL_Unlock.jflash]]
  +
|scope="col" style="text-align:center" | {{NO}}
  +
|[[:Media:STM32WL_Lock.jflash|STM32WL_Lock.jflash]]
  +
|}
  +
<references/>
  +
{{Note|1=
  +
<ul>
  +
<li>Some STM32 devices require a power-on reset if the read out protection is set and the debugger is still connected through JTAG/SWD.</li>
  +
<li>
  +
All command files and J-Flash projects have a specific MCU selected.
  +
For the sole purpose of locking the device via J-Link commander changing of the device name is not necessary.<br>
  +
<!-- See http://forum.segger.com/index.php?page=Thread&threadID=4150 -->
  +
'''However, it is mandatory to change the device name to the actual device used when using J-Flash or doing any flash programming in J-Link commander.'''
  +
</li>
  +
<li>
  +
Please note that securing a device via J-Link command files is limited in a way that interpretation of return values,
  +
if / else branches etc. are not available. Therefore, production programming and securing of devices can only be done with
  +
J-Flash or the J-Link SDK.
  +
</li>
  +
<li>In any case, it is the responsibility of the user to verify that the required read out protection is active before the programming device leaves the production facility.</li>
  +
<li>The files provided in the table above can also be used to change all other user option bytes, as the general procedure of unlocking and programming them is the same.</li>
  +
</ul>
  +
}}

Revision as of 10:26, 15 February 2024

The GD32 Cortex-M Series is family of devices by GigaDevice Semiconductor Inc.
The following article contains information which applies to all members of the product family (e.g. readout protection).
Information which is more specific to the respective sub-family(e.g. QSPI programming) is provided in family specific articles.

A list of all GigaDevice devices supported by SEGGER can be found here.
For further information regarding the product family, please refer to the website and documentation by GigaDevice.

Device security

On connect, the device security is checked. If security is set (and recoverable) the user is asked if they want security to be lifted. If the user agrees, security is lifted by J-Link (if possible).

Note:
  • It is possible to disable device access completely, by setting Protection level to high. A connect will not be possible anymore afterwards and the security cannot be reset.
  • It is possible to save the selection of the unlock dialog. To reset this, please refer to: Reset unlock message box.

Connect under reset

In case that J-Link fails to connect to the device (usually caused by a low-power state of the MCU), J-Link will try to connect to the device under reset to make debugging possible.


MCU Security

Disabling readout protection

J-Link Commander and J-Flash

J-Link Commander and J-Flash automatically detect secured STM32 devices and ask the user if it should be unlocked.

Flasher standalone mode

In order to unlock a STM32 device in stand-alone mode, the unlock sequence is executed automatically if a secured device is detected.

Enabling readout protection

All provided J-Link Commander command files set the protection level to low (OB_SPC = 0x11 / OB_SPC_N = 0xEE). In order to set protection level to high, the value "0x11" needs to be changed to "0xCC" and "0xEE" to "0x33". Please note that protection level high is permanent and can neither be reverted by SEGGER nor by GigaDevice.

Device Table

GD32 series overview
Sub-Family Core J-Link Commander and J-Flash:
native Unlock support 		J-Link Commander:
Lock via command file 		STM32 Unlock tool support J-Flash:
Unlock project 		J-Flash[1]:
native lock support 		J-Flash:
Lock project
ST STM32C0 Cortex-M0 YES.png STM32C0_Lock.jlink NO.png STM32C0_Unlock.jflash NO.png STM32C0_Lock.jflash
ST STM32F0 Cortex-M0 YES.png STM32F0_Lock.jlink YES.png STM32F0_Unlock.jflash YES.png STM32F0_Lock.jflash
ST STM32F1 Cortex-M3 YES.png STM32F1_Lock.jlink YES.png STM32F1_Unlock.jflash YES.png STM32F1_Lock.jflash
ST STM32F2 Cortex-M3 YES.png STM32F2_Lock.jlink YES.png STM32F2_Unlock.jflash YES.png STM32F2_Lock.jflash
ST STM32F3 Cortex-M4 YES.png STM32F3_Lock.jlink YES.png STM32F3_Unlock.jflash YES.png STM32F3_Lock.jflash
ST STM32F4 Cortex-M4 YES.png STM32F4_Lock.jlink YES.png STM32F4_Unlock.jflash YES.png STM32F4_Lock.jflash
ST STM32F7 Cortex-M7 YES.png STM32F7_Lock.jlink YES.png STM32F7_Unlock.jflash YES.png STM32F7_Lock.jflash
ST STM32G0 Cortex-M0+ YES.png STM32G0_Lock.jlink YES.png STM32G0_Unlock.jflash NO.png STM32G0_Lock.jflash
ST STM32G4 Cortex-M4 YES.png STM32G4_Lock.jlink YES.png STM32G4_Unlock.jflash NO.png STM32G4_Lock.jflash
ST STM32H7 Cortex-M7 YES.png STM32H7_Lock.jlink YES.png STM32H7_Unlock.jflash NO.png STM32H7_Lock.jflash
ST STM32L0 Cortex-M0 YES.png STM32L0_Lock.jlink YES.png STM32L0_Unlock.jflash YES.png STM32L0_Lock.jflash
ST STM32L1 Cortex-M3 YES.png STM32L1_Lock.jlink YES.png STM32L1_Unlock.jflash YES.png STM32L1_Lock.jflash
ST STM32L4 Cortex-M4 YES.png STM32L4_Lock.jlink YES.png STM32L4_Unlock.jflash NO.png STM32L4_Lock.jflash
ST STM32L5 Cortex-M33 YES.png STM32L5_Lock.jlink YES.png STM32L5_Unlock.jflash NO.png STM32L5_Lock.jflash
ST STM32U5 Cortex-M33 YES.png STM32U5_Lock.jlink YES.png STM32U5_Unlock.jflash NO.png STM32U5_Lock.jflash
ST STM32WB Cortex-M4 YES.png STM32WB_Lock.jlink YES.png STM32WB_Unlock.jflash NO.png STM32WB_Lock.jflash
ST STM32WBA Cortex-M3 YES.png STM32WBA_Lock.jlink YES.png STM32WBA_Unlock.jflash NO.png STM32WBA_Lock.jflash
ST STM32WL Cortex-M4 YES.png STM32WL_Lock.jlink YES.png STM32WL_Unlock.jflash NO.png STM32WL_Lock.jflash
  1. ↑ For further information regarding native support in J-Flash and why native support is no longer implemented for new devices, please refer to this article: MCU_Security_Options
Note:
  • Some STM32 devices require a power-on reset if the read out protection is set and the debugger is still connected through JTAG/SWD.
  • All command files and J-Flash projects have a specific MCU selected. For the sole purpose of locking the device via J-Link commander changing of the device name is not necessary.
    However, it is mandatory to change the device name to the actual device used when using J-Flash or doing any flash programming in J-Link commander.
  • Please note that securing a device via J-Link command files is limited in a way that interpretation of return values, if / else branches etc. are not available. Therefore, production programming and securing of devices can only be done with J-Flash or the J-Link SDK.
  • In any case, it is the responsibility of the user to verify that the required read out protection is active before the programming device leaves the production facility.
  • The files provided in the table above can also be used to change all other user option bytes, as the general procedure of unlocking and programming them is the same.
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