Difference between revisions of "GigaDevice GD32VW5"
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==Evaluation Boards== |
==Evaluation Boards== |
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| − | *GigaDevice GD32VW553H-EVAL evaluation board |
+ | *[[GigaDevice_GD32VW553H-EVAL | GigaDevice GD32VW553H-EVAL evaluation board ]] |
| + | *[[GigaDevice_GD32VW553K-START | GigaDevice GD32VW553K-START evaluation board ]] |
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==Example Application== |
==Example Application== |
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| − | *GigaDevice GD32VW553H-EVAL evaluation board |
+ | *[[GigaDevice_GD32VW553H-EVAL#Example_Project | GigaDevice GD32VW553H-EVAL evaluation board ]] |
| + | *[[GigaDevice_GD32VW553K-START#Example_Project | GigaDevice GD32VW553K-START evaluation board ]] |
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Revision as of 11:16, 15 January 2024
The GigaDevice GD32VW5 are RISC-V Nuclei core based microprocessors with WIFI and BLE.
Contents
Flash Banks
Internal Flash
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Internal Flash | 0x08000000 | Up to 4 MB | 
|
If J-Link detects any write protected flash pages the user is offered a unprotect of them before connecting to the device. Then OBWPR0 and OBWPR1 will be set to 0x000003FF.
Watchdog Handling
- The device has 2 watchdogs WDGT and FWDGT.
- The watchdogs are fed during flash programming.
Device Specific Handling
Security
If J-Link detects a security protected device (SPC[7:0] != 0xAA) the user is offered a unprotect before connecting to the device. If user chooses unprotect, the device will be erased and OBR set to 0x00000EAA.
Reset
- The devices uses normal RISC-V reset, no special handling necessary, like described here.
