Difference between revisions of "Raspberry Pi RP2040"

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(J-Link Support)
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* Only 1st debug session after power-cycle or reset pin toggle successfully connected.
 
* Only 1st debug session after power-cycle or reset pin toggle successfully connected.
 
** Since J-Link software V7.50: Power-cycle of MCU after 1st debug session is no longer required.
 
** Since J-Link software V7.50: Power-cycle of MCU after 1st debug session is no longer required.
  +
== Reset ==
 
  +
The RP2040 includes a boot ROM which needs to be executed after reset in order to guarantee proper functionality. In case of a valid application has been detected in the external QSPI flash, the boot ROM copies the first 256 bytes from QSPI to SRAM5. In the RP2040 user manual, this code is called "flash second stage" (2nd stage bootloader) which is not part of the boot ROM but is part of the application image thus can be adapted by the user. The J-Link performs a device specific reset which halts on the first instruction at address 0x20041F00 of this so called "flash second stage" (bootloader).
 
== Evaluation boards ==
 
== Evaluation boards ==
 
There are multiple RP2040 evaluation boards.
 
There are multiple RP2040 evaluation boards.

Revision as of 11:58, 25 March 2022

This article covers the Raspberry Pi RP2040 device, an arm Cortex-M0+ dualcore MCU with up to 133 MHz Clock. It is the first MCU designed and published by Raspberry Pi. The RP2040 is present on the Raspberry Pi Pico evaluation board.

Features (selection)

Stat Specification
Core Dualcore M0+
RAM 264kB SRAM
Internal flash No internal flash (ext. QSPI supported)
Pins (multifunc) 30 GPIOs
Pins (dedicated) 6 SPI IOs

For further information please refer to the Raspberry Pi Pico web page

J-Link Support

The Raspberry Pi RP2040 is fully supported by J-Link.

  • Support was implemented with J-Link Software Pack V6.96.
  • Only 1st debug session after power-cycle or reset pin toggle successfully connected.
    • Since J-Link software V7.50: Power-cycle of MCU after 1st debug session is no longer required.

Reset

The RP2040 includes a boot ROM which needs to be executed after reset in order to guarantee proper functionality. In case of a valid application has been detected in the external QSPI flash, the boot ROM copies the first 256 bytes from QSPI to SRAM5. In the RP2040 user manual, this code is called "flash second stage" (2nd stage bootloader) which is not part of the boot ROM but is part of the application image thus can be adapted by the user. The J-Link performs a device specific reset which halts on the first instruction at address 0x20041F00 of this so called "flash second stage" (bootloader).

Evaluation boards

There are multiple RP2040 evaluation boards. For all of the ones listed below, sample applications are available.

Sample projects

SEGGER Embedded Studio provides a RP2040 board support package for the RP2040 Pico. It is easily adjusted to all other available RP2040 boards, especially, as the QSPI pin-out is not modifiable. Additionally, the articles listed under Evaluation boards all provide sample applications.