Difference between revisions of "Renesas RZ/T2M"
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== QSPI Flash Programming Support == |
== QSPI Flash Programming Support == |
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Before continuing with this article, please read the generic article about QSPI flash programming support: [[QSPI_Flash_Programming_Support]] |
Before continuing with this article, please read the generic article about QSPI flash programming support: [[QSPI_Flash_Programming_Support]] |
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=== Setup === |
=== Setup === |
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*Hardware: Renesas RZ/T2M-RSK |
*Hardware: Renesas RZ/T2M-RSK |
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*Device: R9A07G075M0 |
*Device: R9A07G075M0 |
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*SPI Flash: Macronix MX25R512 64MB flash) |
*SPI Flash: Macronix MX25R512 64MB flash) |
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=== Port / Pin Configuration === |
=== Port / Pin Configuration === |
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{| class="wikitable" |
{| class="wikitable" |
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| XSPI0_RESET0 || P16_1 |
| XSPI0_RESET0 || P16_1 |
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== Parallel CFI NOR Flash Programming Support == |
== Parallel CFI NOR Flash Programming Support == |
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The J-Link software supports flash programming of an externally connected parallel CFI NOR flash out-of-the-box. The pins used on the RZ/T2M-RSK are assumed by default. The external memory starts at address 0x70000000. |
The J-Link software supports flash programming of an externally connected parallel CFI NOR flash out-of-the-box. The pins used on the RZ/T2M-RSK are assumed by default. The external memory starts at address 0x70000000. |
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==Reset== |
==Reset== |
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No device specific reset but generic v8-AR core reset is performed, see TBD. |
No device specific reset but generic v8-AR core reset is performed, see TBD. |
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| + | ==JTAG Authentication== |
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| + | TBD |
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==Evaluation Boards== |
==Evaluation Boards== |
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*Renesas RZ/T2M-RSK: https://wiki.segger.com/Renesas_RZ/T2M-RSK |
*Renesas RZ/T2M-RSK: https://wiki.segger.com/Renesas_RZ/T2M-RSK |
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Revision as of 13:59, 7 June 2022
Contents
The RZ/T2M is an high-performance multi-function MPU featuring two Cortex-R52 cores.
QSPI Flash Programming Support
Before continuing with this article, please read the generic article about QSPI flash programming support: QSPI_Flash_Programming_Support
Setup
- Hardware: Renesas RZ/T2M-RSK
- Device: R9A07G075M0
- SPI Flash: Macronix MX25R512 64MB flash)
Port / Pin Configuration
| Alternate function | Port / Pin |
|---|---|
| XSPI0_DS | P14_4 |
| XSPI0_CKP | P14_6 |
| XSPI0_IO0 | P14_7 |
| XSPI0_IO1 | P15_0 |
| XSPI0_IO2 | P15_1 |
| XSPI0_IO3 | P15_2 |
| XSPI0_CS0 | P15_7 |
| XSPI0_RESET0 | P16_1 |
Parallel CFI NOR Flash Programming Support
The J-Link software supports flash programming of an externally connected parallel CFI NOR flash out-of-the-box. The pins used on the RZ/T2M-RSK are assumed by default. The external memory starts at address 0x70000000.
Note:
This may be changed in future versions so that customers have to perform the external BUS interface initilization by themselves
This may be changed in future versions so that customers have to perform the external BUS interface initilization by themselves
Reset
No device specific reset but generic v8-AR core reset is performed, see TBD.
JTAG Authentication
TBD
Evaluation Boards
- Renesas RZ/T2M-RSK: https://wiki.segger.com/Renesas_RZ/T2M-RSK
Example Application
- Renesas RZ/T2M-RSK: https://wiki.segger.com/Renesas_RZ/T2M-RSK#Example_Project
