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- 11:41, 10 February 2023 (diff | hist) . . (-1) . . Analog ADuCM430
- 11:41, 10 February 2023 (diff | hist) . . (-2) . . Analog ADuCM430 (→Example Application)
- 11:41, 10 February 2023 (diff | hist) . . (-1) . . Analog ADuCM430 (→Evaluation Boards)
- 11:31, 10 February 2023 (diff | hist) . . (+766) . . N Analog ADuCM430 (Created page with "__TOC__ This article describes the device specific handling for Analog Device's ADuCM430 family which is based on Cortex-M3. ==Flash Banks== ===Internal Flash=== {| class="se...")
- 17:36, 8 February 2023 (diff | hist) . . (-11) . . CFI Flash (→[Deprecated] J-Flash without RAM) (current)
- 17:36, 8 February 2023 (diff | hist) . . (+36) . . CFI Flash
- 15:45, 8 February 2023 (diff | hist) . . (+153) . . CFI Flash (→J-Flash)
- 11:15, 3 February 2023 (diff | hist) . . (0) . . N File:TI CC1354P10 TestProject ES V634.zip (current)
- 11:02, 3 February 2023 (diff | hist) . . (0) . . N File:TI CC1354P10 Connect.PNG (current)
- 11:02, 3 February 2023 (diff | hist) . . (+196) . . TI LaunchPad CC1354P10 (→Preparing for J-Link)
- 11:00, 3 February 2023 (diff | hist) . . (0) . . File:TI LaunchPadCC1354P10.jpg (Erik uploaded a new version of File:TI LaunchPadCC1354P10.jpg) (current)
- 10:59, 3 February 2023 (diff | hist) . . (0) . . N File:TI LaunchPadCC1354P10.jpg
- 10:59, 3 February 2023 (diff | hist) . . (-11) . . TI LaunchPad CC1354P10
- 10:28, 3 February 2023 (diff | hist) . . (0) . . TI LaunchPad CC1354P10
- 10:27, 3 February 2023 (diff | hist) . . (+11) . . TI LaunchPad CC1354P10
- 10:27, 3 February 2023 (diff | hist) . . (-75) . . TI LaunchPad CC1354P10
- 10:11, 3 February 2023 (diff | hist) . . (+913) . . N TI LaunchPad CC1354P10 (Created page with "__TOC__ This article describes specifics for the TI LaunchPad CC1354P10 evaluation board.<br> '''[PICTURE OF BOARD]''' 450px == Preparing for J...")
- 10:02, 3 February 2023 (diff | hist) . . (+1,809) . . N TI CC1354P10 (Created page with "__TOC__ The TI CC1354 family features a powerful Cortex-M33 core with a maximum operating frequency of 48-MHz. ==Flash== ===Internal flash=== The CC1354 features up to 1024 KB...")
- 16:27, 30 January 2023 (diff | hist) . . (+12) . . Multi-Core Debugging (→CTI)
- 16:14, 30 January 2023 (diff | hist) . . (-4) . . NXP S32K3xx (→Example Application)
- 16:13, 30 January 2023 (diff | hist) . . (-4) . . NXP S32K3xx (→Reset)
- 16:12, 30 January 2023 (diff | hist) . . (+130) . . NXP S32K3xx (→Reset)
- 16:09, 30 January 2023 (diff | hist) . . (+132) . . NXP S32K3xx (→Multi-Core Support)
- 16:08, 30 January 2023 (diff | hist) . . (-112) . . NXP S32K3xx (→Attach)
- 16:08, 30 January 2023 (diff | hist) . . (+16) . . NXP S32K3xx (→Reset)
- 16:07, 30 January 2023 (diff | hist) . . (+70) . . NXP S32K3xx (→Multi-Core Support)
- 16:06, 30 January 2023 (diff | hist) . . (+34) . . NXP S32K3xx (→Multi-Core Support)
- 16:06, 30 January 2023 (diff | hist) . . (+8) . . NXP S32K3xx (→Multi-Core Support)
- 16:06, 30 January 2023 (diff | hist) . . (+4) . . NXP S32K3xx (→RAM)
- 16:06, 30 January 2023 (diff | hist) . . (+38) . . NXP S32K3xx (→Multi-Core Support)
- 16:05, 30 January 2023 (diff | hist) . . (+459) . . NXP S32K3xx (→Multi-Core Support)
- 15:42, 30 January 2023 (diff | hist) . . (+282) . . Multi-Core Debugging (→CTI)
- 15:35, 30 January 2023 (diff | hist) . . (+24) . . Multi-Core Debugging (→Terminologies)
- 15:35, 30 January 2023 (diff | hist) . . (+12) . . Multi-Core Debugging (→Terminologies)
- 15:35, 30 January 2023 (diff | hist) . . (+158) . . Multi-Core Debugging (→Terminologies)
- 15:27, 30 January 2023 (diff | hist) . . (+3) . . Multi-Core Debugging (→CTI)
- 15:27, 30 January 2023 (diff | hist) . . (+81) . . Multi-Core Debugging
- 15:27, 30 January 2023 (diff | hist) . . (+48) . . NXP S32K3xx (→Multi-Core Support)
- 15:26, 30 January 2023 (diff | hist) . . (-112) . . NXP S32K3xx (→Multi-Core Support)
- 15:26, 30 January 2023 (diff | hist) . . (+23) . . NXP S32K3xx (→Multi-Core Support)
- 15:25, 30 January 2023 (diff | hist) . . (-28) . . NXP S32K3xx (→Multi-Core Support)
- 15:24, 30 January 2023 (diff | hist) . . (+133) . . NXP S32K3xx (→Multi-Core Debug Support)
- 15:20, 30 January 2023 (diff | hist) . . (+103) . . Multi-Core Debugging
- 15:19, 30 January 2023 (diff | hist) . . (+113) . . Multi-Core Debugging (→Memory)
- 15:17, 30 January 2023 (diff | hist) . . (-3) . . Multi-Core Debugging
- 15:16, 30 January 2023 (diff | hist) . . (-2) . . Multi-Core Debugging
- 15:15, 30 January 2023 (diff | hist) . . (+10) . . Multi-Core Debugging
- 15:15, 30 January 2023 (diff | hist) . . (+3) . . Multi-Core Debugging (→Memory)
- 15:14, 30 January 2023 (diff | hist) . . (+439) . . Multi-Core Debugging
- 15:10, 30 January 2023 (diff | hist) . . (-24) . . Multi-Core Debugging
- 15:10, 30 January 2023 (diff | hist) . . (+806) . . Multi-Core Debugging
- 14:49, 30 January 2023 (diff | hist) . . (+18) . . Multi-Core Debugging
- 14:48, 30 January 2023 (diff | hist) . . (+173) . . N Multi-Core Debugging (Created page with "Basically, there are two two different approaches when it comes to multi-core setups: ===SMP (Symmerical multiprocessing)=== TBD ===AMP (Asymmetrical multiprocessing)=== TBD")
- 13:01, 30 January 2023 (diff | hist) . . (+111) . . NXP S32K3xx
- 12:57, 26 January 2023 (diff | hist) . . (-1) . . NXP S32K3xx (→Limitations)
- 12:56, 26 January 2023 (diff | hist) . . (-2) . . NXP S32K3xx (→Limitations)
- 12:56, 26 January 2023 (diff | hist) . . (+38) . . NXP S32K3xx (→Limitations)
- 12:55, 26 January 2023 (diff | hist) . . (+100) . . NXP S32K3xx
- 12:19, 26 January 2023 (diff | hist) . . (+77) . . NXP S32K3xx (→RAM)
- 12:18, 26 January 2023 (diff | hist) . . (+49) . . NXP S32K3xx
- 17:30, 9 January 2023 (diff | hist) . . (+21) . . N NXP K32W14 (Created page with "Under construction...") (current)
- 17:19, 9 January 2023 (diff | hist) . . (-8) . . Debug Probes - J-Link & J-Trace (→NXP)
- 17:19, 9 January 2023 (diff | hist) . . (+26) . . Debug Probes - J-Link & J-Trace (→NXP)
- 17:17, 9 January 2023 (diff | hist) . . (+13) . . NXP X-KW45B41Z (→SETUP)
- 17:16, 9 January 2023 (diff | hist) . . (0) . . N File:NXP X-KW45B41Z JLinkCommander.PNG (current)
- 17:16, 9 January 2023 (diff | hist) . . (+11) . . NXP X-KW45B41Z (→Preparing for J-Link)
- 17:15, 9 January 2023 (diff | hist) . . (0) . . N File:NXP X-KW45B41Z.jpg (current)
- 17:15, 9 January 2023 (diff | hist) . . (-2) . . NXP X-KW45B41Z
- 17:14, 9 January 2023 (diff | hist) . . (-6) . . NXP KW45 (→Evaluation Boards)
- 17:14, 9 January 2023 (diff | hist) . . (+55) . . NXP KW45 (→Example Application)
- 17:14, 9 January 2023 (diff | hist) . . (+44) . . NXP KW45 (→Evaluation Boards)
- 17:13, 9 January 2023 (diff | hist) . . (+1,137) . . N NXP X-KW45B41Z (Created page with "__TOC__ This article describes specifics for the NXP KW45B41Z evaluation board. The board supports different Upgrade boards. It can be used to test & verify NXP KW45 and NXP...")
- 17:12, 9 January 2023 (diff | hist) . . (+34) . . Debug Probes - J-Link & J-Trace (→NXP)
- 17:05, 9 January 2023 (diff | hist) . . (+934) . . N NXP KW45 (Created page with "__TOC__ The '''NXP KW45''' are multicore devices composed of one Cortex-M33 and one Cortex-M3. Currently J-Link supports the Cortex-M33. ==Internal Flash== ===Supported Region...")
- 09:43, 20 December 2022 (diff | hist) . . (+804) . . J-Link ARMv8-AR
- 16:47, 19 December 2022 (diff | hist) . . (+32) . . Debug Probes - J-Link & J-Trace (→Renesas)
- 16:47, 19 December 2022 (diff | hist) . . (+32) . . Debug Probes - J-Link & J-Trace (→Renesas)
- 16:33, 19 December 2022 (diff | hist) . . (+54) . . Renesas RZ/G2UL SMARC EVK (→Preparing for J-Link)
- 16:32, 19 December 2022 (diff | hist) . . (0) . . N File:Renesas RZG2UL Connect.gif (current)
- 16:29, 19 December 2022 (diff | hist) . . (0) . . N File:Renesas RZG2UL RAM TestProject ES V542.zip (current)
- 13:01, 19 December 2022 (diff | hist) . . (+1,083) . . N Renesas RZ/G2UL SMARC EVK (Created page with "__TOC__ This article describes specifics for the Renesas RZ/G2UL. A generic startup guide + additional information can be found on Renesas website. File:Renesas_RZG2UL_EVK...")
- 12:59, 19 December 2022 (diff | hist) . . (+621) . . N Renesas RZ/G2UL (Created page with "__TOC__ The Renesas RZ/G2UL series features a Cortex-A55 (single or dual) as main processors and a Cortex-M33 as co-processor. ==Cores== ===Cortex-M33=== By default, the Corte...")
- 11:27, 22 November 2022 (diff | hist) . . (+12) . . Using J-Link VCOM functionality (→Parity Test) (current)
- 11:26, 22 November 2022 (diff | hist) . . (-111) . . Using J-Link VCOM functionality (→Parity Test)
- 11:26, 22 November 2022 (diff | hist) . . (-46) . . Using J-Link VCOM functionality (→Parity Test)
- 11:25, 22 November 2022 (diff | hist) . . (+12) . . Using J-Link VCOM functionality (→Even Parity)
- 11:24, 22 November 2022 (diff | hist) . . (+972) . . Using J-Link VCOM functionality (→Testing VCOM functionality and speed)
- 11:24, 22 November 2022 (diff | hist) . . (0) . . N File:VCOM EvenParity Scope.png (current)
- 11:23, 22 November 2022 (diff | hist) . . (0) . . N File:VCOM EvenParity Config.png (current)
- 11:23, 22 November 2022 (diff | hist) . . (0) . . N File:VCOM OddParity Scope.png (current)
- 11:22, 22 November 2022 (diff | hist) . . (0) . . N File:VCOM OddParity Config.png (current)
- 11:15, 22 November 2022 (diff | hist) . . (0) . . N File:VCOM NoPartiy Scope.png (current)
- 11:15, 22 November 2022 (diff | hist) . . (0) . . N File:VCOM NoPartiy Config.png (current)
- 17:15, 16 November 2022 (diff | hist) . . (+154) . . Renesas RA6M3 (→Internal option-setting memory)
- 17:13, 16 November 2022 (diff | hist) . . (0) . . Renesas RA6M3 (→Internal option-setting memory)
- 15:06, 4 November 2022 (diff | hist) . . (+48) . . MindMotion MM32F5
- 11:44, 11 October 2022 (diff | hist) . . (-376) . . J-Link GDB Server (→setbp)
- 11:18, 11 October 2022 (diff | hist) . . (+376) . . J-Link GDB Server (→setbp)
- 11:01, 7 September 2022 (diff | hist) . . (0) . . Renesas RZ/A3UL (→Flash)
- 08:51, 2 September 2022 (diff | hist) . . (0) . . Renesas RZ/N2L (→QSPI Flash Programming Support)