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- 18:21, 27 February 2024 GigaDevice GD32F310C-EVAL (hist) [1,080 bytes] Joshua.Kozian (talk | contribs) (Created page with "__TOC__ This article describes specifics for the GigaDevice GD32F310C-EVAL evaluation board.<br> 450px == Preparing f...")
- 17:54, 27 February 2024 GigaDevice GD32350C-START (hist) [1,083 bytes] Joshua.Kozian (talk | contribs) (Created page with "__TOC__ This article describes specifics for the GigaDevice GD32350C-START evaluation board.<br> 450px == Preparing fo...")
- 16:28, 27 February 2024 GigaDevice GD32330C-START (hist) [1,084 bytes] Joshua.Kozian (talk | contribs) (Created page with "__TOC__ This article describes specifics for the GigaDevice GD32330C-START evaluation board.<br> 450px == Preparing fo...")
- 15:39, 27 February 2024 GigaDevice GD32F310F-START (hist) [1,086 bytes] Joshua.Kozian (talk | contribs) (Created page with "__TOC__ This article describes specifics for the GigaDevice GD32F310F-START evaluation board.<br> 450px == Preparin...")
- 14:33, 27 February 2024 GigaDevice GD32F303B-START (hist) [1,095 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the [SiliconVendor] [EvalBoardName] evaluation board.<br> '''[PICTURE OF BOARD]''' 450px == Prepar...")
- 11:27, 27 February 2024 GigaDevice GD32F4 (hist) [2,188 bytes] Torben.scharping (talk | contribs) (Created page with "The GigaDevice GD32F4 series are 32-bit general-purpose microcontrollers based on the ARM Cortex-M4 processor. __TOC__ ==Flash Banks== ===Internal Flash=== {| class="seggert...")
- 17:43, 23 February 2024 NXP iMX6SX SABRE (hist) [864 bytes] Matthias (talk | contribs) (Created page with "__TOC__ This article describes specifics for the NXP iMX6SX SABRE evaluation board.<br> 450px == Preparing for J-Link == *Connect the J-Link to...")
- 14:44, 22 February 2024 GigaDevice GD32F3 (hist) [2,236 bytes] Torben.scharping (talk | contribs) (Created page with "The GigaDevice GD32F3 series are 32-bit general-purpose microcontrollers based on the ARM Cortex-M4 processor. __TOC__ ==Flash Banks== ===Internal Flash=== {| class="seggert...")
- 11:51, 22 February 2024 Flasher SECURE/How to configure a TELP for STM32Gxxx with user-defined SECxR values (hist) [10,087 bytes] Peter (talk | contribs) (Created page with "The STM32G range of ST's Cortex-M microcontrollers has a number of security features to protect intellectual property (IP). As some of these features may conflict with each ot...") originally created as "How to configure a TELP for STM32Gxxx, with user-defined SECxR values?"
- 18:20, 21 February 2024 Flasher SECURE (hist) [293 bytes] Peter (talk | contribs) (Created page with "The SEGGER Flasher Secure family is a high performance production programmer for secure authorized programming. == How to ... == *How to configure a TELP for STM32Gxxx, wit...")
- 16:53, 19 February 2024 How to optimize a Firmware for minimal Size (hist) [15,230 bytes] Johannes (talk | contribs) (Created page with "Toolchains offer various options to reduce firmware size and require less Flash memory. There are additional tweaks which can be applied in code to remove unused functionality...")
- 10:05, 15 February 2024 GigaDevice GD32 (hist) [7,958 bytes] Torben.scharping (talk | contribs) (Created page with "The GD32 Cortex-M Series is family of devices by GigaDevice Semiconductor Inc. The following article contains information which applies to all members of the product family (e...")
- 18:05, 14 February 2024 Use ST-Link in Embedded Studio (hist) [1,257 bytes] Nino (talk | contribs) (Created page with "This article will explain how a ST-Link can be used for debugging in Embedded Studio. == Minimum Requirements == * Embedded Studio V8.10 or later * ST-Link V2 or later * STM...")
- 13:44, 9 February 2024 NXP FRDM-MCXN236 (hist) [939 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the NXP X-FRDM-MCXN236 evaluation board.<br> 450px == Preparing for J-Link == *Con...") originally created as "NXP X-FRDM-MCXN236"
- 13:43, 9 February 2024 NXP MCXN11 (hist) [876 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ The '''NXP MCXN11''' are single core Arm Cortex-M33 microprocessors. ==Flash Banks== ===Internal Flash=== {| class="seggertable" |- ! Flash Bank || Base address !! Si...")
- 11:35, 8 February 2024 ArteryTek AT32A40x (hist) [1,382 bytes] Torben.scharping (talk | contribs) (Created page with "Artery AT32F40x are Cortex-M4 based MCUs __TOC__ ==Flash Banks== ===Internal Flash=== {| class="seggertable" |- ! Flash Bank || Base address !! Size || J-Link Support |- | In...") originally created as "Artery AT32A40x"
- 11:05, 8 February 2024 ArteryTek AT-START-A403A (hist) [1,195 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the Artery AT-START-FA403A evaluation board.<br> 450px == Preparing for...") originally created as "Artery AT-START-A403A"
- 18:24, 7 February 2024 ArteryTek AT-START-F407 (hist) [1,194 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the Artery AT-START-F407 evaluation board.<br> 450px == Preparing for J-Lin...") originally created as "Artery AT-START-F407"
- 15:34, 7 February 2024 ArteryTek AT-START-F403A (hist) [1,203 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the Artery AT-START-F403 evaluation board.<br> 450px == Preparing for J-Li...") originally created as "Artery AT-START-F403"
- 09:40, 7 February 2024 Geehy G32A1xx (hist) [1,529 bytes] Arne.kulinna (talk | contribs) (Created page with "__TOC__ The Geehy G32A1xx are Cortex-M4 based MCUs. Following information also applies for devices of the Geehy G32A1xx family. ==Internal Flash== ===Supported Regions=== The...")