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- 17:36, 21 March 2024 NXP i.MX 8XLite (hist) [2,230 bytes] Artjom.Kister (talk | contribs) (Created page with "__TOC__ The '''NXP i.MX 8''' is an embedded multi-core processor consisting of one Cortex-M4, two Cortex-A53. == Debugging == J-Link supports debugging for the Cortex-M4. Du...") originally created as "i.MX 8XLite Family"
- 17:35, 21 March 2024 NXP i.MX 8X (hist) [2,299 bytes] Artjom.Kister (talk | contribs) (Created page with "__TOC__ The '''NXP i.MX 8X''' is an embedded multi-core processor consisting of one Cortex-M4, four Cortex-A35. == Debugging == J-Link supports debugging for the Cortex-M4....") originally created as "i.MX 8X Family"
- 17:34, 21 March 2024 NXP i.MX 8M Plus (hist) [1,988 bytes] Artjom.Kister (talk | contribs) (Created page with "__TOC__ The '''NXP i.MX 8M Plus''' is an embedded multi-core processor consisting of two Cortex-M7, four Cortex-A53 and two Cortex-A72. == Debugging == J-Link supports debug...") originally created as "i.MX 8M Plus Family"
- 17:32, 21 March 2024 NXP i.MX 8M Nano (hist) [1,627 bytes] Artjom.Kister (talk | contribs) (Created page with "__TOC__ The '''NXP i.MX 8M Nano''' is a embedded multicore processor consisting of one Cortex-M7 and four Cortex-A53. == Debugging == J-Link supports debugging for the Corte...") originally created as "i.MX 8M Nano Family"
- 17:31, 21 March 2024 NXP i.MX 8M Mini (hist) [1,473 bytes] Artjom.Kister (talk | contribs) (Created page with "__TOC__ The '''NXP i.MX 8M Mini''' is a embedded multicore processor consisting of one Cortex-M4 and four Cortex-A53. == Debugging == J-Link supports debugging for the Corte...") originally created as "i.MX 8M Mini Family"
- 17:30, 21 March 2024 NXP i.MX 8M (hist) [1,462 bytes] Artjom.Kister (talk | contribs) (Created page with "__TOC__ The '''NXP i.MX 8M''' is a embedded multicore processor consisting of one Cortex-M4 and four Cortex-A53. == Debugging == J-Link supports debugging for the Cortex-M4....") originally created as "i.MX 8M Family"
- 17:22, 21 March 2024 NXP i.MX 8 (hist) [2,018 bytes] Artjom.Kister (talk | contribs) (Created page with "__TOC__ The '''NXP i.MX8''' is a embedded multicore processor consisting of one Cortex-M4 and four Cortex-A53 and two Cortex-A72. == Debugging == J-Link supports debugging f...") originally created as "i.MX 8 Family"
- 15:33, 20 March 2024 Flasher Hub - Module Configuration (hist) [1,962 bytes] Leon (talk | contribs) (Created page with "Flasher Hub-12 allows to configure some options that affect the connected modules.<br> The configuration can be applied using the integrated web interface. __TOC__ == Positi...") originally created as "Flasher Hub-12 - Module Configuration"
- 17:49, 18 March 2024 Renesas FPB-R9A02G021 (hist) [891 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the Renesas FPB-R9A02G021 evaluation board.<br> '''[PICTURE OF BOARD]''' 450px == Preparing for J-...")
- 16:06, 18 March 2024 Renesas ASSP EASY (hist) [1,147 bytes] Torben.scharping (talk | contribs) (Created page with "The '''[SiliconVendor] [DeviceFamily]''' are [SHORT_DESCRIPTION] __TOC__ ==Flash Banks== ===Internal Flash=== {| class="seggertable" |- ! Flash Bank || Base address !! Size |...")
- 11:02, 13 March 2024 NXP FRDM-MCXA156 (hist) [964 bytes] Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the NXP FRDM-MCXN236 evaluation board.<br> 450px == Preparing for J-Link == *Con...")