Difference between revisions of "J-Link Command Strings"
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== SWOSetConversionMode == |
== SWOSetConversionMode == |
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This command is used to set the SWO conversion mode. |
This command is used to set the SWO conversion mode. |
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+ | |||
+ | {{Note|If the calling application (usually an IDE) makes use of SWO, it is expected that SWO data is periodically read by the calling application, from the J-Link software. Therefore, usually a 4 MB buffer on the J-Link software side is sufficient to buffer the SWO data between the intervals where the calling application empties the buffer. In order to minimize overhead, it is recommended that the calling application retrieves data from the J-Link software in big chunks (> 1 MB per SWO_Read() call).}} |
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=== Syntax === |
=== Syntax === |
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<tt>SWOSetConversionMode = <ConversionMode></tt> |
<tt>SWOSetConversionMode = <ConversionMode></tt> |
Revision as of 09:06, 4 July 2024
The behavior of the J-Link can be customized via J-Link Command Strings passed to the JLinkARM.dll which controls J-Link. Applications such as J-Link Commander, but also other IDEs, allow passing one or more J-Link Command Strings. Command strings can be used for passing commands to J-Link (such as switching on target power supply), as well as customize the behavior (by defining memory regions and other things) of J-Link. This way, J-Link Command Strings enable to set options which are not configurable via dialogs or settings (e.g. in an IDE).
Contents
- 1 List of available commands
- 1.1 AppendToLogFile
- 1.2 CORESIGHT_AddAP
- 1.3 CORESIGHT_SetCoreBaseAddr
- 1.4 CORESIGHT_SetCTICoreBaseAddr
- 1.5 CORESIGHT_SetIndexAHBAPToUse
- 1.6 CORESIGHT_SetIndexAPBAPToUse
- 1.7 CORESIGHT_SetIndexBGMemAPToUse
- 1.8 CORESIGHT_SetETBBaseAddr
- 1.9 CORESIGHT_SetETBBufSize
- 1.10 CORESIGHT_SetMTBBaseAddr
- 1.11 CORESIGHT_SetMTBBufBaseAddr
- 1.12 CORESIGHT_SetMTBBufUseAddr
- 1.13 CORESIGHT_SetMTBBufUsageSize
- 1.14 CORESIGHT_SetETMBaseAddr
- 1.15 CORESIGHT_SetPTMBaseAddr
- 1.16 CORESIGHT_SetTFBaseAddr
- 1.17 CORESIGHT_SetTMCBaseAddr
- 1.18 CORESIGHT_SetTPIUBaseAddr
- 1.19 CORESIGHT_SetSTMBaseAddr
- 1.20 CORESIGHT_SetSTMTraceID
- 1.21 CORESIGHT_SetTFEnableMask
- 1.22 device
- 1.23 DEVICE_SelectLoader
- 1.24 DisableAutoUpdateFW
- 1.25 DisableCortexMXPSRAutoCorrectTBit
- 1.26 DisableFlashBPs
- 1.27 DisableFlashDL
- 1.28 DisableInfoWinFlashBPs
- 1.29 DisableInfoWinFlashDL
- 1.30 DisableLowPowerHandlingMode
- 1.31 DisableLTRACEAnalysis
- 1.32 DisableMOEHandling
- 1.33 DisablePowerSupplyOnClose
- 1.34 EnableAutoUpdateFW
- 1.35 EnableEraseAllFlashBanks
- 1.36 EnableFlashBPs
- 1.37 EnableFlashDL
- 1.38 EnableInfoWinFlashBPs
- 1.39 EnableInfoWinFlashDL
- 1.40 EnableLowPowerHandlingMode
- 1.41 EnableMOEHandling
- 1.42 EnableRemarks
- 1.43 ExcludeFlashCacheRange
- 1.44 HideDeviceSelection
- 1.45 HSSLogFile
- 1.46 InhibitConnectRetries
- 1.47 InvalidateCache
- 1.48 InvalidateFW
- 1.49 JLinkDevicesXMLPath
- 1.50 MaxTraceWorker
- 1.51 map exclude
- 1.52 map illegal
- 1.53 map indirectread
- 1.54 map ram
- 1.55 map region
- 1.56 map reset
- 1.57 MemPreserveOnReset
- 1.58 PIC32_StayInICSPProgMode
- 1.59 ProjectFile
- 1.60 ReadIntoTraceCache
- 1.61 RISCV_SetTEBaseAddr
- 1.62 RISCV_SetPIBRefCenter
- 1.63 RISCV_UseNexusViaATB
- 1.64 RISCV_SetTFBaseAddr
- 1.65 RISCV_SetSRAMBaseAddr
- 1.66 RISCV_SetPIBBaseAddr
- 1.67 RISCV_SetATBBaseAddr
- 1.68 RISCV_SetHartSel
- 1.69 RTTTelnetAllowNonLocalClient
- 1.70 ScriptFile
- 1.71 SelectTraceSource
- 1.72 SetAllowStopMode
- 1.73 SetAllowFlashCache
- 1.74 SetHostIF
- 1.75 SetAllowSimulation
- 1.76 SetBatchMode
- 1.77 SetCFIFlash
- 1.78 SetCheckModeAfterRead
- 1.79 SetCompareMode
- 1.80 SetCPUConnectIDCODE
- 1.81 SetDbgPowerDownOnClose
- 1.82 SetEnableMemCache
- 1.83 SetETBIsPresent
- 1.84 SetETMIsPresent
- 1.85 SetFlashDLNoRMWThreshold
- 1.86 SetFlashDLThreshold
- 1.87 SetIgnoreReadMemErrors
- 1.88 SetIgnoreWriteMemErrors
- 1.89 SetInitWorkRAMOnConnect
- 1.90 SetLogVerbose
- 1.91 SetMonModeDebug
- 1.92 TraceFile
- 1.93 TraceSampleAdjust
- 1.94 TRACE_SetEnableStalling
- 1.95 TRACE_SetEnableITMExceptionPackets
- 1.96 TRACE_SetEnableITMPCSamples
- 1.97 TRACE_SetEnableITMTimestamps
- 1.98 TRACE_SetSTMDataFile
- 1.99 TRACE_SetSTMDataPort
- 1.100 TRACE_SetBackTraceMaxNumItems
- 1.101 SetResetPulseLen
- 1.102 SetResetType
- 1.103 SetRestartOnClose
- 1.104 SetRTTAddr
- 1.105 SetRTTTelnetPort
- 1.106 SetRTTSearchRanges
- 1.107 SetRXIDCode
- 1.108 SetSkipDebugDeInit
- 1.109 SetSkipProgOnCRCMatch
- 1.110 SetSkipRestoreRAMCode
- 1.111 SetSysPowerDownOnIdle
- 1.112 SetVerifyDownload
- 1.113 SetVerifyRAMDownload
- 1.114 SetSkipL1Verify
- 1.115 SetWorkRAM
- 1.116 ShowControlPanel
- 1.117 SilentUpdateFW
- 1.118 SupplyPower
- 1.119 SupplyPowerDefault
- 1.120 SuppressControlPanel
- 1.121 SuppressGUI
- 1.122 SuppressInfoUpdateFW
- 1.123 SWOSetConversionMode
- 1.124 SWOSetHostBufferSize
- 1.125 SetVTrefTmp
- 2 Using J-Link Command Strings
List of available commands
The table below lists and describes the available J-Link Command Strings.
Command | Description |
---|---|
AppendToLogFile | Enables/Disables always appending new loginfo to logfile. |
CORESIGHT_AddAP | |
CORESIGHT_SetCoreBaseAddr | Sets core base address. |
CORESIGHT_SetCTICoreBaseAddr | Sets CTI core base address. |
CORESIGHT_SetIndexAHBAPToUse | Selects a specific AHB-AP to be used to connect to a Cortex-M device. |
CORESIGHT_SetIndexAPBAPToUse | Selects a specific APB-AP to be used to connect to a Cortex-A or Cortex-R device. |
CORESIGHT_SetIndexBGMemAPToUse | Selects AP to be used for background memory accesses (only has an effect on certain cores). |
CORESIGHT_SetETBBaseAddr | Sets ETB base address. |
CORESIGHT_SetETBBufSize | Can be used to set ETB buffer size if autodetection fails. |
CORESIGHT_SetMTBBaseAddr | Sets MTB base address. |
CORESIGHT_SetMTBBufBaseAddr | Specifies the base address of the MTB buffer (RAM that may be used by MTB). |
CORESIGHT_SetMTBBufUseAddr | Specifies where the MTB shall start using the RAM. |
CORESIGHT_SetMTBBufUsageSize | Specifies max. RAM usage for MTB. |
CORESIGHT_SetETMBaseAddr | Sets ETM base address. |
CORESIGHT_SetPTMBaseAddr | Sets PTM base address. |
CORESIGHT_SetTFBaseAddr | Sets Trace Funnel base address. |
CORESIGHT_SetTMCBaseAddr | Sets TMC base address. |
CORESIGHT_SetTPIUBaseAddr | Sets TPIU base address. |
CORESIGHT_SetSTMTraceID | Sets System Trace Macrocell trace ID. |
CORESIGHT_SetSTMBaseAddr | Sets System Trace Macrocell trace base address. |
CORESIGHT_SetTFEnableMask | Sets the CSTF mask. |
device | Selects the target device. |
DEVICE_SelectLoader | Selects the target device flash loader. |
DisableAutoUpdateFW | Disables automatic firmware update. |
DisableCortexMXPSRAutoCorrectTBit | Disables auto-correction of XPSR T-bit for Cortex-M devices. |
DisableFlashBPs | Disables the FlashBP feature. |
DisableFlashDL | Disables the J-Link FlashDL feature. |
DisableInfoWinFlashBPs | Disables info window for programming FlashBPs. |
DisableInfoWinFlashDL | Disables info window for FlashDL. |
DisableLowPowerHandlingMode | Disables low-power handling mode |
DisableLTRACEAnalysis | Disables LTRACE analyzer. |
DisableMOEHandling | Disables output of additional information about mode of entry in case the target CPU is halted / entered debug mode. |
DisablePowerSupplyOnClose | Disables power supply on close. |
EnableAutoUpdateFW | Enables automatic firmware update. |
EnableEraseAllFlashBanks | Enables erase for all accessible flash banks. |
EnableFlashBPs | Enables the FlashBP feature. |
EnableFlashDL | Enables the J-Link FlashDL feature. |
EnableInfoWinFlashBPs | Enables info window for programming FlashBPs. |
EnableInfoWinFlashDL | Enables info window for FlashDL. |
EnableLowPowerHandlingMode | Enables low-power handling mode |
EnableMOEHandling | Enables output of additional information about mode of entry in case the target CPU is halted / entered debug mode. |
EnableRemarks | Enable detailed output during CPU-detection / connection process. |
ExcludeFlashCacheRange | Invalidate flash ranges in flash cache, that are configured to be excluded from flash cache. |
HideDeviceSelection | Hide device selection dialog. |
HSSLogFile | Logs all HSS-Data to file, regardless of the application using HSS. |
InhibitConnectRetries | Inhibit multiple connection retries (e.g. with reset pin toggled before / while reset pin halteD) in case of initial connect failed. |
InvalidateCache | Invalidates Cache. |
InvalidateFW | Invalidating current firmware. |
JLinkDevicesXMLPath | Specify JLinkDevices XML folder path |
MaxTraceWorker | Sets maximum number of active trace analyzer threads |
map exclude | Ignores all memory accesses to specified area. |
map illegal | Marks a specified memory region as an illegal memory area. Memory accesses to this region are ignored. |
map indirectread | Specifies an area which should be read indirect. |
map ram | Specifies location of target RAM. |
map region | Specifies a memory region. |
map reset | Restores the default mapping, which means all memory accesses are permitted. |
MemPreserveOnReset | Adds a memory preserve area to the internal list of memory areas. |
PIC32_StayInICSPProgMode | Requests to stay in ICSP programming mode rather than ICSP debugging mode |
ProjectFile | Specifies a file or directory which should be used by the J-Link DLL to save the current configuration. |
ReadIntoTraceCache | Reads the given memory area into the streaming trace instruction cache. |
RISCV_SetTEBaseAddr | Sets the trace encoder (TE) base address. |
RISCV_SetPIBRefCenter | Configures how the trace signals are output on SiFive RISC-V chips. |
RISCV_UseNexusViaATB | Informs the J-Link DLL that the trace sink for the RISC-V N-Trace components is an ATB. |
RISCV_SetTFBaseAddr | Sets the trace funnel sink (TF) base address. |
RISCV_SetSRAMBaseAddr | Sets the SRAM sink base address. |
RISCV_SetPIBBaseAddr | Sets the PIB sink base address. |
RISCV_SetATBBaseAddr | Sets the ATB sink base address. |
RISCV_SetHartSel | Selects a specific hart to work with. |
RTTTelnetAllowNonLocalClient | Allows non local clients to connect to RTT over Telnet. |
ScriptFile | Set script file path. |
SelectTraceSource | Selects which trace source should be used for tracing. |
SetAllowStopMode | Allows/Disallows usage of stop mode for RTT and memory accesses. |
SetAllowFlashCache | Enables/Disables flash cache usage. |
SetHostIF | Can be used to override the host interface. Please refer to InitEmu(). |
SetAllowSimulation | Enables/Disables instruction set simulation. |
SetBatchMode | Enables/Disables batch mode. |
SetCFIFlash | Specifies CFI flash area. |
SetCheckModeAfterRead | Enables/Disables CPSR check after read operations. |
SetCompareMode | Specifies the compare mode to be used. |
SetCPUConnectIDCODE | Specifies an CPU IDCODE that is used to authenticate the debug probe, when connecting to the CPU. |
SetDbgPowerDownOnClose | Used to power-down the debug unit of the target CPU when the debug session is closed. |
SetEnableMemCache | Enables/Disables DLL internal memory caching mechanisms that improve performance |
SetETBIsPresent | Selects if the connected device has an ETB. |
SetETMIsPresent | Selects if the connected device has an ETM. |
SetFlashDLNoRMWThreshold | Specifies a threshold when writing to flash memory does not cause a read-modify-write operation. |
SetFlashDLThreshold | Set minimum amount of data to be downloaded. |
SetIgnoreReadMemErrors | Specifies if read memory errors will be ignored. |
SetIgnoreWriteMemErrors | Specifies if write memory errors will be ignored. |
SetInitWorkRAMOnConnect | Used to indicate that it is necessary to initialize the work RAM on connect (important for ECC RAM). |
SetLogVerbose | Enables J-Link Log file verbose mode. |
SetMonModeDebug | Enables/Disables monitor mode debugging. |
SetResetPulseLen | Defines the length of the RESET pulse in milliseconds. |
SetResetType | Selects the reset strategy. |
SetRestartOnClose | Specifies restart behavior on close. |
SetRTTAddr | Set address of the RTT buffer. |
SetRTTSearchRanges | Set ranges to be searched for RTT buffer. |
SetRTTTelnetPort | Set the port used for RTT telnet. |
SetRXIDCode | Specifies an ID Code for Renesas RX devices to be used by the J-Link DLL. |
SetSkipDebugDeInit | May be used to skip debug de-init on debug session close. |
SetSkipProgOnCRCMatch | Deprecated. Use SetCompareMode instead. |
SetSkipRestoreRAMCode | Specifies if restoring of RAMCode is skipped. |
SetSysPowerDownOnIdle | Used to power-down the target CPU, when there are no transmissions between J-Link and target CPU, for a specified time frame. |
SetVerifyDownload | Specifies the verify option to be used. |
SetVerifyRAMDownload | Enables verification of downloads into RAM. |
SetSkipL1Verify | Disables the 1st-level verify. |
SetWorkRAM | Specifies RAM area to be used by the J-Link DLL. |
ShowControlPanel | Opens control panel. |
SilentUpdateFW | Update new firmware automatically. |
SupplyPower | Activates/Deactivates power supply over pin 19 of the JTAG connector. |
SupplyPowerDefault | Activates/Deactivates power supply over pin 19 of the JTAG connector permanently. |
SuppressControlPanel | Suppress pop up of the control panel. |
SuppressGUI | Suppress any GUI the J-Link software may spawn. |
SuppressInfoUpdateFW | Suppress information regarding firmware updates. |
SWOSetConversionMode | Set SWO Conversion mode. |
SWOSetHostBufferSize | Set SWO host buffer size. |
TraceFile | Sets path for trace file to capture RAWTrace data. |
TraceSampleAdjust | Allows to adjust the sampling timing on the specified pins, inside the J-Trace firmware. |
TRACE_SetEnableITMExceptionPackets | Enables/disables ITM exception packet generation. |
TRACE_SetEnableITMPCSamples | Enables/disables ITM PC sample packet generation. |
TRACE_SetEnableITMTimestamps | Enables/disables ITM timestamp packet generation.. |
TRACE_SetEnableStalling | Enables optional stalling feature of the target device's trace encoder. |
TRACE_SetSTMDataFile | Enables storing of STM data to file. (Mutually exclusive with TRACE_SetSTMDataPort) |
TRACE_SetSTMDataPort | Enables storing of STM data to port. (Mutually exclusive with TRACE_SetSTMDataFile) |
TRACE_SetBackTraceMaxNumItems | Specifies max. number of items to be stored in backtrace buffer. |
SetVTrefTmp | Temporarily set VTref to a fixed value between 1.2 and 5 V. |
For a list of Xtensa related command strings, please refer to the J-Link Xtensa specifics article.
AppendToLogFile
This command can be used to configure the AppendToLogFile feature. If enabled, new log data will always be appended to an existing logfile. Otherwise, each time a new connection will be opened, existing log data will be overwritten. By default new log data will not be always appended to an existing logfile.
Syntax
AppendToLogFile = 0 | 1
Example
AppendToLogFile 1
CORESIGHT_AddAP
This command is used to define an AP for an ARM Cortex-M device. This might be necessary for systems with cascaded AP setups.
For example, if the connected target provides the following AP layout:
- AP[0]: AHB-AP
- AP[0]: APB-AP
- AP[1]: AHB-AP
Syntax
CORESIGHT_AddAP = Index=<Index> Type=<Type> Addr=<BaseAddr> Parent=<ParentIndex>
Parameter | Description |
---|---|
Index | Index of the AP |
Type | Type of the AP |
Addr | Base address of the AP in the DP address space |
Parent | Parent AP (Optional) |
Example
CORESIGHT_AddAP = Index=0 Type=APB-AP Addr=0x60002000 CORESIGHT_AddAP = Index=1 Type=AXI-AP Addr=0x60004000 CORESIGHT_AddAP = Index=2 Type=AHB-AP Addr=0x60102000 Parent=0
CORESIGHT_SetCoreBaseAddr
This command is used to set the core base address.
Syntax
CORESIGHT_SetCoreBaseAddr = <Address>
Example
CORESIGHT_SetCoreBaseAddr = 0x00010000
CORESIGHT_SetCTICoreBaseAddr
This command is used to set the CTI core base address. When using ARMv8-AR devices it is mandatory to set this together with the core base address.
Syntax
CORESIGHT_SetCTICoreBaseAddr = <Address>
Example
CORESIGHT_SetCTICoreBaseAddr = 0x00020000
CORESIGHT_SetIndexAHBAPToUse
This command is used to select a specific AHB-AP to be used when connected to an ARM Cortex-M device.
Usually, it is not necessary to explicitly select an AHB-AP to be used, as J-Link auto-detects the AP automatically.
For multi-core systems with multiple AHB-APs it might be necessary.
The index selected here is an absolute index.
For example, if the connected target provides the following AP layout:
- AP[0]: AHB-AP
- AP[1]: APB-AP
- AP[2]: AHB-AP
- AP[3]: JTAG-AP
In order to select the second AHB-AP to be used, use "2" as index.
Syntax
CORESIGHT_SetIndexAHBAPToUse = <Index>
Example
CORESIGHT_SetIndexAHBAPToUse = 2
CORESIGHT_SetIndexAPBAPToUse
This command is used to select a specific APB-AP to be used when connected to an ARM Cortex-A or Cortex-R device.
Usually, it is not necessary to explicitly select an AHB-AP to be used, as J-Link auto-detects the AP automatically.
For multi-core systems with multiple APB-APs it might be necessary.
The index selected here is an absolute index.
For example, if the connected target provides the following AP layout:
- AP[0]: APB-AP
- AP[1]: AHB-AP
- AP[2]: APB-AP
- AP[3]: JTAG-AP
In order to select the second APB-AP to be used, use "2" as index.
Syntax
CORESIGHT_SetIndexAPBAPToUse = <Index>
Example
CORESIGHT_SetIndexAPBAPToUse = 2
CORESIGHT_SetIndexBGMemAPToUse
This command is used to select a specific MEM-AP (AHB-AP or AXI-AP) to be used for background memory accesses.
This is mainly used on cores that do not have mandatory background memory access support (e.g. Cortex-A and Cortex-R based ones) but there is a MEM-AP present on the actual chip.
For example, for Cortex-M based cores, this command string has no effect because for Cortex-M the AHB-AP connected to the core is also used to perform background memory accesses.
Background memory access support is for example needed to support features like RTT and HSS.
For example, if the following AP map is specified for a target device:
- AP[0]: APB-AP
- AP[1]: AHB-AP
- AP[2]: AXI-AP
- AP[3]: JTAG-AP
In order to select AP[2] to be used for background memory accesses, use "2" as index.
Syntax
CORESIGHT_SetIndexBGMemAPToUse = <Index>
Example
CORESIGHT_SetIndexBGMemAPToUse = 2
CORESIGHT_SetETBBaseAddr
This command can be used to set the Coresight ETB base address if the debug probe could not get this information from the target devices ROM table. Additionally an unlock of the module can be forced and an alternative AP index can be set. These settings are optional.
Default values
The default values for the APIndex and base address are usually autodetected by J-Link/J-Trace. So only change these values if the autodetection fails or is incorrect. The default unlock value is 0 (no unlock) for Cortex-A/R cores and 1 (always unlock) for Cortex-M.
Syntax
CORESIGHT_SetETBBaseAddr = <Addr> [ForceUnlock = <ForceUnlock>] [APIndex = <APIndex>]
Example
CORESIGHT_SetETBBaseAddr = 0xE0041000
or
CORESIGHT_SetETBBaseAddr = 0xE0041000 ForceUnlock = 1 APIndex = 2
CORESIGHT_SetETBBufSize
This command can be used to set the Coresight ETB size if the debug probe could not get this information from the target device.
Syntax
CORESIGHT_SetETBBufSize = <Size>
Example
CORESIGHT_SetETBBufSize = 0x4000
CORESIGHT_SetMTBBaseAddr
This command can be used to set the Coresight MTB base address if the debug probe could not get this information from the target devices ROM table. Additionally an unlock of the module can be forced and an alternative AP index can be set. These settings are optional.
Default values
The default values for the APIndex and base address are usually autodetected by J-Link/J-Trace. So only change these values if the autodetection fails or is incorrect. The default unlock value is 1 (always unlock) for Cortex-M.
Syntax
CORESIGHT_SetMTBBaseAddr = <Addr> [ForceUnlock = <ForceUnlock>] [APIndex = <APIndex>]
Example
CORESIGHT_SetMTBBaseAddr = 0xE0041000
or
CORESIGHT_SetMTBBaseAddr = 0xE0041000 ForceUnlock = 1 APIndex = 2
CORESIGHT_SetMTBBufBaseAddr
Specifies the base address of the MTB buffer (RAM that may be used by MTB). This is only needed for devices where the MTB_BASE register returns an incorrect address. (E.g. on the NXP KL26Z series devices)
Syntax
CORESIGHT_SetMTBBufBaseAddr = <Addr>
Example
CORESIGHT_SetMTBBufBaseAddr = 0x20000000
CORESIGHT_SetMTBBufUseAddr
Specifies where the MTB shall start using the RAM. This address may be greater than MTB_BASE but must be within the bound of MTB_BASE and MTB_BASE + MaxBufSize.
Syntax
CORESIGHT_SetMTBBufUseAddr = <Addr>
Example
CORESIGHT_SetMTBBufUseAddr = 0x20000100
CORESIGHT_SetMTBBufUsageSize
Specifies max. RAM usage for MTB (must be a power of 2). This must not exceed MaxBufSize
Syntax
CORESIGHT_SetMTBBufUsageSize = <Size>
Example
CORESIGHT_SetMTBBufUsageSize = 0x1000
CORESIGHT_SetETMBaseAddr
This command can be used to set the Coresight ETM base address if the debug probe could not get this information from the target devices ROM table. Additionally an unlock of the module can be forced and an alternative AP index can be set. These settings are optional.
Default values
The default values for the APIndex and base address are usually autodetected by J-Link/J-Trace. So only change these values if the autodetection fails or is incorrect. The default unlock value is 0 (no unlock) for Cortex-A/R cores and 1 (always unlock) for Cortex-M.
Syntax
CORESIGHT_SetETMBaseAddr = <Addr> [ForceUnlock = <ForceUnlock>] [APIndex = <APIndex>]
Example
CORESIGHT_SetETMBaseAddr = 0xE0041000
or
CORESIGHT_SetETMBaseAddr = 0xE0041000 ForceUnlock = 1 APIndex = 2
CORESIGHT_SetPTMBaseAddr
This command can be used to set the Coresight PTM base address if the debug probe could not get this information from the target devices ROM table. Additionally an unlock of the module can be forced and an alternative AP index can be set. These settings are optional.
Default values
The default values for the APIndex and base address are usually autodetected by J-Link/J-Trace. So only change these values if the autodetection fails or is incorrect. The default unlock value is 0 (no unlock) for Cortex-A/R cores and 1 (always unlock) for Cortex-M.
Syntax
CORESIGHT_SetPTMBaseAddr = <Addr> [ForceUnlock = <ForceUnlock>] [APIndex = <APIndex>]
Example
CORESIGHT_SetPTMBaseAddr = 0xE0041000
or
CORESIGHT_SetPTMBaseAddr = 0xE0041000 ForceUnlock = 1 APIndex = 2
CORESIGHT_SetTFBaseAddr
This command can be used to set the Coresight TF(Trace Funnel) base address if the debug probe could not get this information from the target devices ROM table. Additionally an unlock of the module can be forced and an alternative AP index can be set. These settings are optional.
Default values
The default values for the APIndex and base address are usually autodetected by J-Link/J-Trace. So only change these values if the autodetection fails or is incorrect. The default unlock value is 0 (no unlock) for Cortex-A/R cores and 1 (always unlock) for Cortex-M.
Syntax
CORESIGHT_SetTFBaseAddr = <Addr> [ForceUnlock = <ForceUnlock>] [APIndex = <APIndex>]
Example
CORESIGHT_SetTFBaseAddr = 0xE0041000
or
CORESIGHT_SetTFBaseAddr = 0xE0041000 ForceUnlock = 1 APIndex = 2
CORESIGHT_SetTMCBaseAddr
This command can be used to set the Coresight TMC base address if the debug probe could not get this information from the target devices ROM table. Additionally an unlock of the module can be forced and an alternative AP index can be set. These settings are optional.
Default values
The default values for the APIndex and base address are usually autodetected by J-Link/J-Trace. So only change these values if the autodetection fails or is incorrect. The default unlock value is 0 (no unlock) for Cortex-A/R cores and 1 (always unlock) for Cortex-M.
Syntax
CORESIGHT_SetTMCBaseAddr = <Addr> [ForceUnlock = <ForceUnlock>] [APIndex = <APIndex>]
Example
CORESIGHT_SetTMCBaseAddr = 0xE0041000
or
CORESIGHT_SetTMCBaseAddr = 0xE0041000 ForceUnlock = 1 APIndex = 2
CORESIGHT_SetTPIUBaseAddr
This command can be used to set the Coresight TPIU base address if the debug probe could not get this information from the target devices ROM table. Additionally an unlock of the module can be forced and an alternative AP index can be set. These settings are optional.
Default values
The default values for the APIndex and base address are usually autodetected by J-Link/J-Trace. So only change these values if the autodetection fails or is incorrect. The default unlock value is 0 (no unlock) for Cortex-A/R cores and 1 (always unlock) for Cortex-M.
Syntax
CORESIGHT_SetTPIUBaseAddr = <Addr> [ForceUnlock = <ForceUnlock>] [APIndex = <APIndex>]
Example
CORESIGHT_SetTPIUBaseAddr = 0xE0041000
or
CORESIGHT_SetTPIUBaseAddr = 0xE0041000 ForceUnlock = 1 APIndex = 2
CORESIGHT_SetSTMBaseAddr
This command can be used to set the Coresight STM (System Trace Macrocell) base address if the debug probe could not get this information from the target devices ROM table. Additionally an unlock of the module can be forced and an alternative AP index can be set. These settings are optional.
Default values
The default values for the APIndex and base address are usually autodetected by J-Link/J-Trace. So only change these values if the autodetection fails or is incorrect. The default unlock value is 0 (no unlock) for Cortex-A/R cores and 1 (always unlock) for Cortex-M.
Syntax
CORESIGHT_SetSTMBaseAddr = <Addr> [ForceUnlock = <ForceUnlock>] [APIndex = <APIndex>]
Example
CORESIGHT_SetSTMBaseAddr = 0xE0047000
or
CORESIGHT_SetSTMBaseAddr = 0xE0047000 ForceUnlock = 1 APIndex = 2
CORESIGHT_SetSTMTraceID
This command can be used to set the Coresight STM (System Trace Macrocell) trace ID.
Default values
The default values is 0x40.
Reserved values
Reserved values are:
- 0x00
- 0x7F
- 0x10
Syntax
CORESIGHT_SetSTMTraceID = <ID>
Example
CORESIGHT_SetSTMTraceID = 0x20
CORESIGHT_SetTFEnableMask
This command can be used to set the Coresight CSTF mask.
Default values
See Device documentation
Syntax
CORESIGHT_SetTFEnableMask = <Mask>
Example
CORESIGHT_SetTFEnableMask = 0x12345678
device
This command selects the target device.
Syntax
device = <DeviceID>
DeviceID has to be a valid device identifier.
For a list of all available device identifiers, please refer to the SEGGER homepage.
Example
device = AT91SAM7S256
DEVICE_SelectLoader
This command selects the flash loader for the target device if multiple loaders are available.
Syntax
DEVICE_SelectLoader BankAddr=<FlashBankBase> Loader=<LoaderName>
Parameter | Meaning |
---|---|
FlashBankBase | The base address of the flashbank for which a different loader should be used. |
LoaderName | The name of the loader which should be used. |
Example
DEVICE_SelectLoader BankAddr=<FlashBankBase> Loader=<LoaderName>
DisableAutoUpdateFW
This command is used to disable the automatic firmware update if a new firmware is available.
Syntax
DisableAutoUpdateFW
DisableCortexMXPSRAutoCorrectTBit
Usually, the J-Link DLL auto-corrects the T-bit of the XPSR register to 1, for Cortex-M devices. This is because having it set as 0 is an invalid state and would cause several problems during debugging, especially on devices where the erased state of the flash is 0x00 and therefore on empty devices the T-bit in the XPSR would be 0. Anyhow, if for some reason explicit disable of this auto-correction is necessary, this can be achieved via the following J-Link Command String.
Syntax
DisableCortexMXPSRAutoCorrectTBit
DisableFlashBPs
This command disables the FlashBP feature.
Syntax
DisableFlashBPs
DisableFlashDL
This command disables the J-Link FlashDL feature.
Syntax
DisableFlashDL
DisableInfoWinFlashBPs
This command is used to disable the flash download window for the flash breakpoint feature. Enabled by default.
Syntax
DisableInfoWinFlashBPs
DisableInfoWinFlashDL
This command is used to disable the flash download information window for the flash download feature. Enabled by default.
Syntax
DisableInfoWinFlashDL
DisableLowPowerHandlingMode
This command is used to disable low-power handling mode.
For further information, please refer to Low power debugging.
Disabled by default.
Syntax
DisableLowPowerHandlingMode
DisableLTRACEAnalysis
This command is used to disable the LTRACE analyzer on your host system when streaming trace is used. It can be used in cases where e.g. only the RAWTRACE data should be saved to a file or when the host system is to slow to keep up with the trace stream so at least the "Backtrace" information can be displayed.
Syntax
DisableLTRACEAnalysis = 1
DisableMOEHandling
The J-Link DLL outputs additional information about mode of entry (MOE) in case the target CPU halted / entered debug mode. Disabled by default.
Syntax
DisableMOEHandling
DisablePowerSupplyOnClose
This command is used to ensure that the power supply for the target will be disabled on close.
Syntax
DisablePowerSupplyOnClose
EnableAutoUpdateFW
This command is used to enable the automatic firmware update if a new firmware is available.
Syntax
EnableAutoUpdateFW
EnableEraseAllFlashBanks
Used to enable erasing of other flash banks than the internal, like (Q)SPI flash or CFI flash.
Syntax
EnableEraseAllFlashBanks
EnableFlashBPs
This command enables the FlashBP feature.
Syntax
EnableFlashBPs
EnableFlashDL
This command enables the J-Link ARM FlashDL feature.
Syntax
EnableFlashDL
EnableInfoWinFlashBPs
This command is used to enable the flash download window for the flash breakpoint feature. Enabled by default.
Syntax
EnableInfoWinFlashBPs
EnableInfoWinFlashDL
This command is used to enable the flash download information window for the flash download feature, which is enabled by default.
Syntax
EnableInfoWinFlashDL
EnableLowPowerHandlingMode
Puts the DLL in low-power handling mode.
For further information, please refer to Low power debugging.
Disabled by default.
Syntax
EnableLowPowerHandlingMode
EnableMOEHandling
The J-Link DLL outputs additional information about mode of entry (MOE) in case the target CPU halted / entered debug mode. Disabled by default.
Syntax
EnableMOEHandling
EnableRemarks
The J-Link DLL provides more detailed output during CPU-detection / connection process. Kind of "verbose" option. Disabled by default, therefore only an enable option. Will be reset to "disabled" on each call to JLINK_Open() (reconnect to J-Link).
Syntax
EnableRemarks
ExcludeFlashCacheRange
This command is used to invalidate flash ranges in flash cache, that are configured to be excluded from the cache. Per default, all areas that J-Link knows to be Flash memory, are cached. This means that it is assumed that the contents of this area do not change during program execution. If this assumption does not hold true, typically because the target program modifies the flash content for data storage, then the affected area should be excluded. This will slightly reduce the debugging speed.
Syntax
ExcludeFlashCacheRange <Range>
Example
ExcludeFlashCacheRange 0x10000000-0x100FFFFF
HideDeviceSelection
This command can be used to suppress the device selection dialog. If enabled, the device selection dialog will not be shown in case an unknown device is selected.
Syntax
HideDeviceSelection = 0 | 1
Example
HideDeviceSelection 1 // Device selection will not show up
HSSLogFile
This command enables HSS-Logging. Separate to the application using HSS, all HSS Data will be stored in the specified file.
Syntax
HSSLogFile = <Path>
Example
HSSLogFile = C:\Test.log
InhibitConnectRetries
By default, the J-Link SW performs additional connection attempts such as connect under reset or connect after toggling the reset pin, in case of initial one failed. This command can be used to inhibit additional connection attempts.
Syntax
InhibitConnectRetries = 0 | 1
InvalidateCache
This command is used to invalidate cache.
Syntax
InvalidateCache
InvalidateFW
This command is used to invalidate the current firmware of the J-Link / J-Trace. Invalidating the firmware will force a firmware update. Can be used for downdating. For more information please refer to J-Link / J-Trace firmware
Syntax
InvalidateFW
JLinkDevicesXMLPath
This command is used to specify a JLinkDevicesXML folder path that is different from the default folder.
Syntax
JLinkDevicesXMLPath = C:\Temp\
MaxTraceWorker
This command sets the maximum number of host CPU threads which can be used for trace analysis.
Default value = 16
Maximum value = 32
Note: Must be set after connection to J-Link is opened e.g. in the after target connect hooks in the J-Link script file or Ozone project file.
Syntax
MaxTraceWorker = <NumWorkers>
Example
MaxTraceWorker = 8
map exclude
This command excludes a specified memory region from all memory accesses. All subsequent memory accesses to this memory region are ignored.
Memory mapping
Some devices do not allow access of the entire 4GiB memory area.
Ideally, the entire memory can be accessed; if a memory access fails, the CPU reports this by switching to abort mode.
The CPU memory interface allows halting the CPU via a WAIT signal.
On some devices, the WAIT signal stays active when accessing certain unused memory areas.
This halts the CPU indefinitely (until RESET) and will therefore end the debug session.
This is exactly what happens when accessing critical memory areas.
Critical memory areas should not be present in a device; they are typically a hardware design problem.
Nevertheless, critical memory areas exist on some devices.
To avoid stalling the debug session, a critical memory area can be excluded from access: J-Link will not try to read or write to critical memory areas and instead ignore the access silently.
Some debuggers (such as IAR C-SPY) can try to access memory in such areas by dereferencing non-initialized pointers even if the debugged program (the debuggee) is working perfectly.
In situations like this, defining critical memory areas is a good solution.
Syntax
map exclude <SAddr>-<EAddr>
Example
This is an example for the map exclude command in combination with an NXP LPC2148 MCU.
Memory map:
Range | Description |
---|---|
0x00000000-0x0007FFFF | On-chip flash memory |
0x00080000-0x3FFFFFFF | Reserved |
0x40000000-0x40007FFF | On-chip SRAM |
0x40008000-0x7FCFFFFF | Reserved |
0x7FD00000-0x7FD01FFF | On-chip USB DMA RAM |
0x7FD02000-0x7FD02000 | Reserved |
0x7FFFD000-0x7FFFFFFF | Boot block (remapped from on-chip flash memory) |
0x80000000-0xDFFFFFFF | Reserved |
0xE0000000-0xEFFFFFFF | VPB peripherals |
0xF0000000-0xFFFFFFFF | AHB peripherals |
The "problematic" memory areas are:
Range | Description |
---|---|
0x00080000-0x3FFFFFFF | Reserved |
0x40008000-0x7FCFFFFF | Reserved |
0x7FD02000-0x7FD02000 | Reserved |
0x80000000-0xDFFFFFFF | Reserved |
To exclude these areas from being accessed through J-Link the map exclude command should be used as follows:
map exclude 0x00080000-0x3FFFFFFF map exclude 0x40008000-0x7FCFFFFF map exclude 0x7FD02000-0x7FD02000 map exclude 0x80000000-0xDFFFFFFF
map illegal
This command marks a specified memory region as an illegal memory area. All subsequent memory accesses to this memory region produces a warning message and the memory access is ignored. This command can be used to mark more than one memory region as an illegal area by subsequent calls.
Syntax
map illegal <SAddr>-<EAddr>
Example
map illegal 0xF0000000-0xFFDFFFFF
Additional information
- SAddr has to be a 256-byte aligned address.
The region size has to be a multiple of 256 bytes.
map indirectread
This command can be used to read a memory area indirectly. Indirect reading means that a small code snippet is downloaded into RAM of the target device, which reads and transfers the data of the specified memory area to the host. Before map indirectread can be called a RAM area for the indirect read code snippet has to be defined. Use therefor the map ram command and define a RAM area with a size of >= 256 byte.
Syntax
map indirectread <StartAddressOfArea>-<EndAddress>
Example
map indirectread 0x3fffc000-0x3fffcfff
Additional information
- StartAddressOfArea has to be a 256-byte aligned address.
The region size has to be a multiple of 256 bytes.
map ram
This command should be used to define an area in RAM of the target device. The area must be 256-byte aligned. The data which was located in the defined area will not be corrupted. Data which resides in the defined RAM area is saved and will be restored if necessary. This command has to be executed before map indirectread will be called.
Syntax
map ram <StartAddressOfArea>-<EndAddressOfArea>
Example
map ram 0x40000000-0x40003fff;
Additional information
- StartAddressOfArea has to be a 256-byte aligned address.
The region size has to be a multiple of 256 bytes.
map region
This command is used to specify memory areas with various region types.
Syntax
map region <StartAddressOfArea>-<EndAddressOfArea> <RegionType>
In case of using alias region type:
map region <StartAddressOfArea>-<EndAddressOfArea> <RegionType> <StartAliasedAddress> <AliasedAreaSize>
Region type | Description |
---|---|
N | Normal |
C | Cacheable |
X | Excluded |
XI | Excluded & Illegal |
I | Indirect access |
A | Alias (static, e.g. RAM/flash that is aliased multiple times in one area. Does not change during the debug session.) |
AD | Alias (dynamic, e.g. memory areas where different memories can be mapped to.) |
Example
map region 0x100000-0x1FFFFF C
map region 0x0-0x1ffff A 0x08000000 0x20000
map reset
This command restores the default memory mapping, which means all memory accesses are permitted.
Typical applications
Used with other "map" commands to return to the default values. The map reset command should be called before any other "map" command is called.
Syntax
map reset
Example
map reset
MemPreserveOnReset
This command is used to add a memory preserve area to the internal list of memory areas that need to be preserved before reset and need to be restored after reset.
The memory area specified must be readable by the CPU before reset and must be writeable by the CPU immediately after reset.
This is mainly used for SRAM debug configurations etc.
Required software version: V6.32 or later
Syntax
MemPreserveOnReset <Addr> <Size>[ <Addr> <Size> ...]
Example
MemPreserveOnReset 0x20000000 0x1000
PIC32_StayInICSPProgMode
Special command for Microchip PIC32MX and PIC32MZ series devices, when using ICSP (2-wire JTAG) interface for debugging / programming.
Requests to J-Link to not touch the debug bits in the DEVCFG register, where it would usually enable ICSP debugging mode.
Instead, J-Link keeps the device in ICSP programming mode.
Syntax
PIC32_StayInICSPProgMode = <0/1>
Example
PIC32_StayInICSPProgMode = 1
Notes
This command has no effect for other devices and also no effect when using PIC32MX / MZ via traditional 4-wire JTAG.
The default setting is PIC32_StayInICSPProgMode = 0
ICSP programming and debugging modes are very similar but programming mode has some limitations:
- Flash programming speed is much slower than in ICSP debugging mode because PLL settings are not applied in this mode.
- Other configuration bits are only partially applied (e.g. lock bits are ignored while in this mode and only applied on the next power-on reset)
This command string is supported since J-Link software V7.92e
ProjectFile
This command is used to specify a file used by the J-Link DLL to save the current configuration.
Using this command is recommended if settings need to be saved.
This is typically the case if Flash breakpoints are enabled and used.
It is recommended that an IDE uses this command to allow the JLinkARM.dll to store its settings in the same directory as the project and settings file of the IDE.
The recommended extension for project files is *.jlink.
Assuming the Project is saved under C:\Work\Work and the project contains to targets name Debug and Release, the debug version could set the file name
C:\Work\Work\Debug.jlink.
The release version could use
C:\Work\Work\Release.jlink.
Spaces in the filename are permitted.
Syntax
ProjectFile = <FullFileName>
Example
ProjectFile = C:\Work\Release.jlink
ReadIntoTraceCache
This command is used to read a given memory area into the trace instruction cache. It is mainly used for cases where the download address of the application differs from the execution address. As for trace analysis only cached memory contents are used as memory accesses during trace (especially streaming trace) cause an overhead that is too big, by default trace will only work if execution address is identical to the download address. For other cases, this command can be used to read specific memory areas into the trace instruction cache.
This command causes an immediate read from the target, so it should only be called at a point where memory contents at the given area are known to be valid.
Syntax
ReadIntoTraceCache <Addr> <NumBytes>
Example
ReadIntoTraceCache 0x08000000 0x2000
RISCV_SetTEBaseAddr
This command is used to set the trace encoder(TE) base address for RISC-V devices. Without setting this base address neither buffer nor pin trace will work.
Syntax
RISCV_SetTEBaseAddr= <Addr> [APIndex = <APIndex>]
Default values
The default value for the APIndex is usually the AP where the RISC-V core is located. So only change this value if the trace components is accessible via a different AP than the core.
Example
RISCV_SetTEBaseAddr = 0x10000000
or
RISCV_SetTEBaseAddr = 0x10000000 APIndex = 2
RISCV_SetPIBRefCenter
Enables / Disables RISCV_SetPIBRefCenter. This defines how the trace signals on SiFive Nexus trace are output.
If RISCV_SetPIBRefCenter = 0 then trace data and trace clock are output at the same time, so the trace probe needs to have a sampling delay.
If RISCV_SetPIBRefCenter = 1 then trace data is 90° phase shifted to the trace clock ensuring easier sampling, but the trace clock speed is also halved.
Syntax
RISCV_SetPIBRefCenter = <OnOff>
Example
RISCV_SetPIBRefCenter = 1
RISCV_SetPIBRefCenter = 0
RISCV_UseNexusViaATB
This command is used to Inform the J-Link DLL that the trace sink for the RISC-V N-Trace components is an ATB.
Syntax
RISCV_UseNexusViaATB = <Value>
Default values
Per default the ATB sink is disabled (=0)
Example
RISCV_UseNexusViaATB = 1
Supported since J-Link software V7.88m.
RISCV_SetTFBaseAddr
This command is used to set the trace funnel (TF) base address for RISC-V devices.
Syntax
RISCV_SetTFBaseAddr= <Addr> [APIndex = <APIndex>]
Default values
The default value for the APIndex is usually the AP where the RISC-V core is located. So only change this value if the trace components is accessible via a different AP than the core.
Example
RISCV_SetTFBaseAddr = 0x10000000
or
RISCV_SetTFBaseAddr = 0x10000000 APIndex = 2
Supported since J-Link software V7.88m.
RISCV_SetSRAMBaseAddr
This command is used to set the SRAM sink base address for RISC-V devices.
Syntax
RISCV_SetSRAMBaseAddr = <Addr> [APIndex = <APIndex>]
Default values
The default value for the APIndex is usually the AP where the RISC-V core is located. So only change this value if the trace components is accessible via a different AP than the core.
Example
RISCV_SetSRAMBaseAddr = 0x10000000
or
RISCV_SetSRAMBaseAddr = 0x10000000 APIndex = 2
Supported since J-Link software V7.88m.
RISCV_SetPIBBaseAddr
This command is used to set the PIB sink base address for RISC-V devices.
Syntax
RISCV_SetPIBBaseAddr = <Addr> [APIndex = <APIndex>]
Default values
The default value for the APIndex is usually the AP where the RISC-V core is located. So only change this value if the trace components is accessible via a different AP than the core.
Example
RISCV_SetPIBBaseAddr = 0x10000000 or RISCV_SetPIBBaseAddr = 0x10000000 APIndex = 2
Supported since J-Link software V7.88m.
RISCV_SetATBBaseAddr
This command is used to set the ATB sink base address for RISC-V devices.
Syntax
RISCV_SetATBBaseAddr = <Addr> [APIndex = <APIndex>]
Default values
The default value for the APIndex is usually the AP where the RISC-V core is located. So only change this value if the trace components is accessible via a different AP than the core.
Example
RISCV_SetATBBaseAddr = 0x10000000 or RISCV_SetATBBaseAddr = 0x10000000 APIndex = 2
Supported since J-Link software V7.88m.
RISCV_SetHartSel
This command is used to select a specific hart for RISC-V devices.
Syntax
RISCV_SetHartSel = <Hart>
Default values
The default value is hart 0.
Example
RISCV_SetHartSel = 1
RTTTelnetAllowNonLocalClient
This command is used to set allowance for non local telnet clients to access RTT data. Per default this value is 0 and only local connections are accepted. It can be set to 1 to enable non local connections as well.
This command is allowed to be used before JLINKARM_Open() was called. This can be achieved using J-Link SDK. For more information visit our website.
Syntax
RTTTelnetAllowNonLocalClient = 0 | 1
Example
RTTTelnetAllowNonLocalClient = 1 // enables non local clients
ScriptFile
This command is used to set the path to a J-Link script file which shall be executed. J-Link scriptfiles are mainly used to connect to targets which need a special connection sequence before communication with the core is possible.
Syntax
ScriptFile = <FullFileName>
Example
ScriptFile = C:\Work\Default.JLinkScript
SelectTraceSource
This command selects the trace source which shall be used for tracing.
This is only relevant when tracing on a target that supports trace via pins as well as trace via on-chip trace buffer and a J-Trace (which supports both) is connected to the PC.
Syntax
SelectTraceSource = <SourceNumber>
Trace source number | Description |
---|---|
0 | ETB |
1 | ETM |
2 | MTB |
Example
SelectTraceSource = 0 // Select ETB
SetAllowStopMode
This command is used to allow / disallow stop mode for RTT and memory accesses. Enabled by default, should only be disabled for testing purposes. For more information about different RTT and memory access modes, please refer to:
Syntax
SetAllowStopMode = 0 | 1
Example
SetAllowStopMode = 0 // Disable usage of stop mode
SetAllowFlashCache
This command is used to enable / disable caching of flash contents. Enabled by default.
Syntax
SetAllowFlashCache = 0 | 1
Example
SetAllowFlashCache = 1 // Enables flash cache
SetHostIF
This command can be used to override the host interface. This function should be used used thoughtful and only if you know exactly what you are doing as there are many things which needs to be taken into account. For further information regarding this please refer to InitEmu()
Syntax
SetHostIF USB = <SerialNumber> SetHostIF IP = <IP address>
Example
SetHostIF USB = 123456 // Connect to J-Link via USB (SN 123456) SetHostIF IP = 192.168.0.133 // Connect to J-link with specified IP addr.
SetAllowSimulation
This command can be used to enable or disable the instruction set simulation. By default the instruction set simulation is enabled.
Syntax
SetAllowSimulation = 0 | 1
Example
SetAllowSimulation 1 // Enables instruction set simulation
SetBatchMode
This command is used to tell the J-Link DLL that it is used in batch-mode / automatized mode, so some dialogs etc. will automatically close after a given timeout. Disabled by default.
Syntax
SetBatchMode = 0 | 1
Example
SetBatchMode 1 // Enables batch mode
SetCFIFlash
This command can be used to set a memory area for CFI compliant flashes.
Default values
- NumChips: 1
- NumBits: 16
Syntax
SetCFIFlash <StartAddressOfArea>-<EndAddressOfArea>[, <NumChips>, <NumBits>]
Example
SetCFIFlash 0x10000000-0x100FFFFF
or
SetCFIFlash 0x10000000-0x100FFFFF, 1, 16
SetCheckModeAfterRead
This command is used to enable or disable the verification of the CPSR (current processor status register) after each read operation. By default this check is enabled. However this can cause problems with some CPUs (e.g. if invalid CPSR values are returned). Please note that if this check is turned off (SetCheckModeAfterRead = 0), the success of read operations cannot be verified anymore and possible data aborts are not recognized.
Typical applications
This verification of the CPSR can cause problems with some CPUs (e.g. if invalid CPSR values are returned). Note that if this check is turned off (SetCheckModeAfterRead = 0), the success of read operations cannot be verified anymore and possible data aborts are not recognized.
Syntax
SetCheckModeAfterRead = 0 | 1
Example
SetCheckModeAfterRead = 0
SetCompareMode
This command is used to configure the compare mode.
Syntax
SetCompareMode = <Mode>
<Mode> | Description |
---|---|
0 | Skip |
1 | Using fastest method (default) |
2 | Using CRC |
3 | Using readback |
Example
SetCompareMode = 1 // Select using fastest method
SetCPUConnectIDCODE
Used to specify an IDCODE that is used by J-Link to authenticate itself when connecting to a specific device.
Some devices allow the user to lock out a debugger by default, until a specific unlock code is provided that allows further debugging.
This function allows to automate this process, if J-Link is used in a production environment.
The IDCODE stream is expected as a hex-encoded byte stream.
If the CPU e.g. works on a word-basis for the IDCODE, this stream is interpreted as a little endian formatted stream where the J-Link library then loads the words from and passes them to the device during connect.
Syntax
SetCPUConnectIDCODE = <IDCODE_Stream>
Example
Example authentication key:
- AuthenticationKey0: 0x01234567
- AuthenticationKey1: 0x89ABCDEF
- AuthenticationKey2: 0x00224466
- AuthenticationKey3: 0x88AABBCC
Command string:
exec SetCPUConnectIDCODE 67452301EFCDAB8966442200CCBBAA88
SetDbgPowerDownOnClose
When using this command, the debug unit of the target CPU is powered-down when the debug session is closed.
This command works only for Cortex-M devices.
Typical applications
This feature is useful to reduce the power consumption of the CPU when no debug session is active.
Syntax
SetDbgPowerDownOnClose = <value>
Example
SetDbgPowerDownOnClose = 1 // Enables debug power-down on close. SetDbgPowerDownOnClose = 0 // Disables debug power-down on close.
SetEnableMemCache
Enables/Disables DLL internal memory cache mechanisms that are used to improve performance. By default, memory cache mechanisms are enabled.
Syntax
SetEnableMemCache = 0 | 1
Example
SetEnableMemCache = 0 // Disable memory caching mechanisms
Notes
This command may not be used by any IDE, listed as a supported IDE, to disable memory cache mechanisms by default. It may only be used by specific customers for very specific test cases that needs the cache mechanisms to be disabled.
SetETBIsPresent
This command is used to select if the connected device has an ETB.
Syntax
SetETBIsPresent = 0 | 1
Example
SetETBIsPresent = 1 // ETB is available SetETBIsPresent = 0 // ETB is not available
SetETMIsPresent
This command is used to select if the connected device has an ETM.
Syntax
SetETMIsPresent = 0 | 1
Example
SetETMIsPresent = 1 // ETM is available SetETMIsPresent = 0 // ETM is not available
SetFlashDLNoRMWThreshold
This command sets the J-Link DLL internal threshold when a write to flash memory does not cause a read-modify-write (RMW) operation. For example, when setting this value to 0x800, all writes of amounts of data < 2 KiB will cause the DLL to perform a read-modify-write operation on incomplete sectors.
Default: Writing amounts of < 1 KiB (0x400) to flash causes J-Link to perform a read-modify-write on the flash.
Syntax
SetFlashDLNoRMWThreshold = <value>
Example
SetFlashDLNoRMWThreshold = 0x100 // 256 Bytes
For detailed examples, see here.
SetFlashDLThreshold
This command is used to set a minimum amount of data to be downloaded by the flash download feature.
Syntax
SetFlashDLThreshold = <value>
Example
SetFlashDLThreshold = 0x100 // 256 Bytes
SetIgnoreReadMemErrors
This command can be used to ignore read memory errors. Disabled by default.
Syntax
SetIgnoreReadMemErrors = 0 | 1
Example
SetIgnoreReadMemErrors = 1 // Read memory errors will be ignored SetIgnoreReadMemErrors = 0 // Read memory errors will be reported
SetIgnoreWriteMemErrors
This command can be used to ignore read memory errors. Disabled by default.
Syntax
SetIgnoreWriteMemErrors = 0 | 1
Example
SetIgnoreWriteMemErrors = 1 // Write memory errors will be ignored SetIgnoreWriteMemErrors = 0 // Write memory errors will be reported
SetInitWorkRAMOnConnect
Used to indicate that it is necessary to initialize the work RAM on connect. This is important for devices that provide ECC RAM we use as work RAM and this RAM cannot be read without being written first.
Syntax
SetInitWorkRAMOnConnect = 0 | 1
Example
SetInitWorkRAMOnConnect = 1 // Work RAM will be initialized on connect SetInitWorkRAMOnConnect = 0 // Work RAM will NOT be initialized on connect (default).
See: J-Link Script file samples
SetLogVerbose
This command is used to enable / disable the verbose mode for J-Link log files.
In verbose mode, the J-Link Software will log all data written to & read from the target device.
For information about how to enable a J-Link log file, please refer to the Enable J-Link log file article.
Syntax
SetLogVerbose = 0 | 1
Default == 0
Example
SetLogVerbose = 1 // J-Link log verbose mode is enabled SetLogVerbose = 0 // J-Link log verbose mode is disabled
SetMonModeDebug
This command is used to enable / disable monitor mode debugging. Disabled by default.
Syntax
SetMonModeDebug = 0 | 1
Example
SetMonModeDebug = 1 // Monitor mode debugging is enabled SetMonModeDebug = 0 // Monitor mode debugging is disabled
TraceFile
Can be used to set the path for the trace file to capture RAWTrace data. RAWTrace data is the unfiltered, unanalyzed and raw trace data that is streamed from the target device via the J-Trace PRO to the host PC.
To be able to analyze the streamed RAW data it is necessary to know how the trace Arm Coresight components are initialized. It is user responsibility to acquire this data from the target device. For more information see the corresponding Arm documentation.
The RAW trace data will be saved in 2 GiB chunks/files. Once 2 GiB are saved into a file a new file will be opened and the file name incremented. Make sure that the trace file feature is used only for a reasonable amount of time. Transfer rates can be up to 150 MiB/s.
Make sure you have enough disc space for your planned recording before starting it. For the same reason the usage of an SSD is recommended. Most HDDs will not have fast enough write speeds to cope with the incoming trace data.
Syntax
TraceFile = <TraceFilePath>
Example
TraceFile = C:\Temp\TraceFile.bin
TraceSampleAdjust
Allows to adjust the sample point for the specified trace data signals inside the J-Trace firmware. This can be useful to compensate certain delays on the target hardware (e.g. caused by routing etc.).
Syntax
TraceSampleAdjust <PinName> = <Adjust_Ps>[ <PinName>=<Adjust_Ps> ...]
<PinName> | Description |
---|---|
TD | Adjust all trace data signals |
TD0 | Adjust trace data 0 |
TD1 | Adjust trace data 1 |
TD2 | Adjust trace data 2 |
TD3 | Adjust trace data 3 |
TD3..0 | Adjust trace data 0-3 |
TD2..1 | Adjust trace data 1-2 |
TDx..y | Adjust trace data x-y |
<Adjust_Ps> | Description |
---|---|
-5000 to 5000 | Adjustment in [ps] |
Example
TraceSampleAdjust TD = 1000
TRACE_SetEnableStalling
When set will try enable stalling mode for trace encoders that support this feature e.g. ETMv4.5 and RISC-V N-Trace encoder. Stalling is an optional feature which instead of allowing trace overflows will temporarily halt/stall the MCU until the trace buffer is cleared and will then continue execution.
Syntax
TRACE_SetEnableStalling = 0 | 1
Example
TRACE_SetEnableStalling = 1
TRACE_SetEnableITMExceptionPackets
If the ITM is being used in the debugger, via this option it is possible to enable or disable the generation of exception packets.
Syntax
TRACE_SetEnableITMExceptionPackets = 0 | 1
Example
TRACE_SetEnableITMExceptionPackets = 1
TRACE_SetEnableITMPCSamples
If the ITM is being used in the debugger, via this option it is possible to enable or disable the generation of ITM PC samples.
Syntax
TRACE_SetEnableITMPCSamples = 0 | 1
Example
TRACE_SetEnableITMPCSamples = 1
TRACE_SetEnableITMTimestamps
If the ITM is being used in the debugger, via this option it is possible to set with which frequency the ITM timestamp packets are generated. Minimum value is 64. Maximum value is 16384. Between 64 and 1024 values with 64 increment are valid. Between 1024 and 16384 values with 1024 increment are valid. Default value is 1024 cycles. Setting this option will also automatically enable ITM timestamp packet generation.
Syntax
TRACE_SetEnableITMTimestamps = <Cycles>
Example
TRACE_SetEnableITMTimestamps = 512
TRACE_SetSTMDataFile
Can be used to set the path for the STM trace data file to capture the raw STM data send from the target device.
It is mutually exclusive with exec command TRACE_SetSTMDataPort
Syntax
TRACE_SetSTMDataFile = <TraceFilePath>
Example
TRACE_SetSTMDataFile = C:\Temp\STMData.bin
TRACE_SetSTMDataPort
Can be used to set the TCP port on which the raw STM data is send to from the target device. The data is then streamed to localhost.
It is mutually exclusive with exec command TRACE_SetSTMDataFile
Syntax
TRACE_SetSTMDataPort = <Port>
Example
TRACE_SetSTMDataPort = 19099
TRACE_SetBackTraceMaxNumItems
When doing instruction tracing via pins the recorded trace data is stored temporarily in system RAM. Per default the number of trace items stored in the backtrace buffer is ~64 million items. This limits the amount of time that can be recorded and can be displayed once the target device is halted. To lift the limit and increase the number of items that can be stored the following exec command can be used.
Note: Please be aware of the fact that if you increase the number of of items drastically your host system resources will be used up quite quickly. For reference, to store 1 billion items you already require at least 4 GB of system RAM. If you now want to display that data somehow e.g. in Ozone in a timeline that RAM usage goes up to more than 8 GB for the same amount of data. So make sure that your host system has enough RAM to display that much trace data. Additionally the time needed to display the recorded data is significantly higher than the time it took to record it e.g. if you record for 10 seconds it can take up to a minute to display the data in e.g. Ozone.
Syntax
TRACE_SetBackTraceMaxNumItems = <NumItems>
Example
TRACE_SetBackTraceMaxNumItems = 0x80000000
SetResetPulseLen
This command defines the length of the RESET pulse in milliseconds. The default for the RESET pulse length is 20 milliseconds.
Syntax
SetResetPulseLen = <value>
Example
SetResetPulseLen = 50
SetResetType
This command selects the reset strategy which shall be used by J-Link, to reset the device. The value which is used for this command is analog to the reset type which shall be selected. For a list of all reset types which are available, please refer to Reset strategies. Please note that there different reset strategies for ARM 7/9 and Cortex-M devices.
Syntax
SetResetType = <value>
Example
SetResetType = 0 // Selects reset strategy type 0: normal
SetRestartOnClose
This command specifies whether the J-Link restarts target execution on close. The default is to restart target execution. This can be disabled by using this command.
Syntax
SetRestartOnClose = 0 | 1
Example
SetRestartOnClose = 1
SetRTTAddr
In some cases J-Link cannot locate the RTT buffer in known RAM. This command is used to set the exact address manually.
Syntax
SetRTTAddr <RangeStart>
Example
SetRTTAddr 0x20000000
SetRTTTelnetPort
This command alters the RTT telnet port. Default is 19021. This command must be called before a connection to a J-Link is established. In J-Link Commander, J-Link Command Strings ("exec <JLinkCommandString>") can only be executed after a connection to J-Link is established, therefore this command string has no effect in J-Link Commander. The -RTTTelnetPort command line parameter can be used instead.
Syntax
SetRTTTelnetPort <value>
Example
SetRTTTelnetPort 9100
SetRTTSearchRanges
In some cases J-Link cannot locate the RTT buffer in known RAM. This command is used to set (multiple) ranges to be searched for the RTT buffer.
Syntax
SetRTTSearchRanges <RangeAddr> <RangeSize> [, <RangeAddr1> <RangeSize1>, ..]
Example
SetRTTSearchRanges 0x10000000 0x1000, 0x20000000 0x1000,
SetRXIDCode
This command is used to set the ID Code for Renesas RX devices to be used by the J-Link DLL.
Syntax
SetRXIDCode = <RXIDCode_String>
Example
Set 16 IDCode Bytes (32 Characters).
SetRXIDCode = 112233445566778899AABBCCDDEEFF00
SetSkipDebugDeInit
This command may be used to skip the debug de-init J-Link usually performs on debug session close.
By default, J-Link clears all debug bits on debug session close to make sure that low power modes on the target chip work as expected and the chip does not draw unnecessarily much power. When using this command, the debug unit of the target CPU is powered-down when the debug session is closed.
Under certain circumstances debug de-init may not be desried. For example: Cortex-M - Application uses cycle counter
By setting this option to 1, the target chip may draw more power than usual, when it enters low power modes.
Syntax
SetSkipDebugDeInit = <value>
Example
SetSkipDebugDeInit = 1 // Skips debug de-init on disconnect / debug session close.
SetSkipProgOnCRCMatch
Deprecated. Use SetCompareMode instead.
This command is used to configure the CRC match / compare mode.
SetSkipRestoreRAMCode
This command is used to skip the restoring of the RAMCode.
Syntax
SetSkipRestoreRAMCode = 0 | 1
Example
SetSkipRestoreRAMCode = 1
SetSysPowerDownOnIdle
When using this command, the target CPU is powered-down when no transmission between J-Link and the target CPU was performed for a specific time. When the next command is given, the CPU is powered-up.
This command works only for Cortex-M3 devices.
Typical applications
This feature is useful to reduce the power consumption of the CPU.
Syntax
SetSysPowerDownOnIdle = <value>
A 0 for <value> disables the power-down on idle functionality.
Example
SetSysPowerDownOnIdle = 10; // The target CPU is powered-down when there is no // transmission between J-Link and target CPU for // at least 10ms
SetVerifyDownload
This command is used to configure the verify mode.
Syntax
SetVerifyDownload = <VerifyMode>
Compare mode | Description |
---|---|
0 | Skip |
1 | Programmed sectors, fastest method (default) |
2 | Programmed sectors using CRC |
3 | Programmed sectors using readback |
4 | All sectors using fastest method |
5 | All sectors using CRC |
6 | All sectors using read back |
7 | Programmed sectors using checksum |
8 | All sectors using checksum |
Example
SetVerifyDownload = 1 // Select programmed sectors, fastest method
SetVerifyRAMDownload
Enables verification of downloads into RAM. These are disabled by default because most IDEs verify them on their own by reading back the memory after writing it. As especially for large downloads into external DDR RAM a double verify would cost significant time, J-Link does not verify such downloads implicitly by default.
Syntax
SetVerifyRAMDownload = <value>
Example
SetVerifyRAMDownload = 1
SetSkipL1Verify
Used to disable the 1st-level verify that is usually done by RAMCodes right after programming a chunk of data
Syntax
SetSetSkipL1Verify = <value>
Example
SetSetSkipL1Verify = 1
SetWorkRAM
This command can be used to configure the RAM area which will be used by J-Link.
Syntax
SetWorkRAM <StartAddressOfArea>-<EndAddressOfArea>
Example
SetWorkRAM 0x10000000-0x100FFFFF
ShowControlPanel
Executing this command opens the J-Link web control panel.
Syntax
ShowControlPanel
SilentUpdateFW
After using this command, new firmware will be updated automatically without opening a message box.
Syntax
SilentUpdateFW
SupplyPower
This command activates power supply over pin 19 of the JTAG connector.
Typical applications
This feature is useful for some eval boards that can be powered over the JTAG connector.
Syntax
SupplyPower = 0 | 1
Example
SupplyPower = 1
SupplyPowerDefault
This command activates power supply over pin 19 of the JTAG connector permanently.
Typical applications
This feature is useful for some eval boards that can be powered over the JTAG connector.
Syntax
SupplyPowerDefault = 0 | 1
Example
SupplyPowerDefault = 1
SuppressControlPanel
Using this command ensures, that the control panel will not pop up automatically.
Syntax
SuppressControlPanel
SuppressGUI
Using this command ensures, that the J-Link software will not spawn any graphical user interfaces (i.e. message boxes, firmware update dialogs, etc.).
This can be useful for headless environments or automated setups.
IDEs, debuggers and similar applications should not use this command string for normal operation, as visual feedback is desired in that case.
- When suppressing GUI, error messages or similar that would be displayed to the user using a dialog may only be visible in the J-Link log file.
- This command may be executed before a J-Link connection has been established. This can be achieved using J-Link SDK. For more information visit our website.
Syntax
SuppressGUI
SuppressInfoUpdateFW
After using this command information about available firmware updates will be suppressed.
We strongly recommend not to use this command, latest firmware versions should always be used!
Syntax
SuppressInfoUpdateFW
SWOSetConversionMode
This command is used to set the SWO conversion mode.
If the calling application (usually an IDE) makes use of SWO, it is expected that SWO data is periodically read by the calling application, from the J-Link software. Therefore, usually a 4 MB buffer on the J-Link software side is sufficient to buffer the SWO data between the intervals where the calling application empties the buffer. In order to minimize overhead, it is recommended that the calling application retrieves data from the J-Link software in big chunks (> 1 MB per SWO_Read() call).
Syntax
SWOSetConversionMode = <ConversionMode>
Conversion mode | Description |
---|---|
0 | If only '\n' is received, make it "\r\n" to make the line end Windows-compliant. (Default behavior) |
1 | Leave everything as it is, do not add any characters. |
Example
SWOSetConversionMode = 0
SWOSetHostBufferSize
This command is used to set the SWO host buffer size in bytes.
Syntax
SWOSetHostBufferSize = <HexValueInBytes>
Example
SWOSetHostBufferSize = 0x1000000
SetVTrefTmp
With this command you can set VTref temporarily to a fixed value between 1.2 and 5 V independent from the measured value. Due to the command is temporary the J-Link DLL will withdraw this temporary change on debug session end (Close()). In case of the temporary overwrite should be restored to the previous VTref mode (fixed or measured) earlier, this can be achieved by entering "0" <Voltage in mV>.
Syntax
SetVTrefTmp <Voltage in mV>
Using J-Link Command Strings
The recommend way to execute J-Link command strings is to add them to a J-Link script file for repetitive use, e.g. on debug session start. For this J-Link script file function JLINK_ExecCommand can be used.
If this however is not an option, there are other ways to execute a J-Link Command String:
- J-Link Commander: Via the exec command.
- Ozone: By adding Exec.Command("<CommandString>"); to the fitting function in the Ozone project file (.jdebug).
- Note: In most cases, this should either be BeforeTargetConnect() or AfterTargetConnect(), depending on if the Command String requires a target connection or not.
- For further information, please refer to the Ozone User Manual (UM08025)
- SEGGER Embedded Studio: Project options -> Debug -> J-Link -> Additional J-Link Options