User contributions
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- 23:22, 26 July 2022 (diff | hist) . . (+883) . . N Cadence HiFi 3z (Created page with "Efficiently supports front-end audio processing like beamforming and noise reduction, as well as The Cadence HiFi 3z is an efficient 32-bit DSP for audio front-end processi...")
- 23:19, 26 July 2022 (diff | hist) . . (0) . . Cadence HiFi 3
- 23:19, 26 July 2022 (diff | hist) . . (0) . . Cadence HiFi 1
- 23:19, 26 July 2022 (diff | hist) . . (+10) . . Cadence HiFi 1
- 23:18, 26 July 2022 (diff | hist) . . (+728) . . N Cadence HiFi 3 (Created page with "__TOC__ The Cadence HiFi 3 is an efficient 32-bit DSP for audio enhancement algorithms, wideband voice codecs and multi-channel audio The HiFi 3 is based on the Cadence Xtens...")
- 23:15, 26 July 2022 (diff | hist) . . (+719) . . N Cadence HiFi 1 (Created page with "The Cadence HiFi 1 is an ultra-low-energy DSP for always-on sensor, always-listening voice trigger, Bluetooth/BLE, ... codecs. The HiFi 1 is based on the Cadence Xtensa LX arc...")
- 23:13, 26 July 2022 (diff | hist) . . (+730) . . J-Link GDB Server (→Semihosting)
- 15:24, 21 July 2022 (diff | hist) . . (-3) . . J-Link ST SR5E1 (current)
- 10:53, 15 July 2022 (diff | hist) . . (+21) . . J-Link Command Strings (→Using J-Link Command Strings)
- 10:52, 15 July 2022 (diff | hist) . . (+90) . . J-Link Command Strings (→Using J-Link Command Strings)
- 10:51, 15 July 2022 (diff | hist) . . (+152) . . J-Link Cortex-M application uses cycle counter (current)
- 10:50, 15 July 2022 (diff | hist) . . (-4) . . J-Link Cortex-M application uses cycle counter
- 10:49, 15 July 2022 (diff | hist) . . (+1,552) . . N J-Link Cortex-M application uses cycle counter (Created page with "The ARM Cortex-M cores provide a cycle counter as part of the Data Watchpoint and Trace unit (DWT) which is a debug unit of the Cortex-M cores. {{Note | 1=J-Link assumes that...")
- 10:32, 15 July 2022 (diff | hist) . . (+146) . . J-Link Command Strings (→List of available commands)
- 10:31, 15 July 2022 (diff | hist) . . (+892) . . J-Link Command Strings (→SetSkipProgOnCRCMatch)
- 10:22, 15 July 2022 (diff | hist) . . (-27) . . J-Link Command Strings (→SetDbgPowerDownOnClose)
- 10:12, 15 July 2022 (diff | hist) . . (+48) . . Debug Probes - J-Link & J-Trace (→Troubleshooting)
- 10:12, 15 July 2022 (diff | hist) . . (+53) . . Debug Probes - J-Link & J-Trace (→Troubleshooting)
- 21:51, 13 July 2022 (diff | hist) . . (0) . . SEGGER Flash Loader (→JLinkDevices folder)
- 17:41, 13 July 2022 (diff | hist) . . (0) . . m J-Link ST SR5E1 (Alex moved page J-Link ST SR5E1 series to J-Link ST SR5E1)
- 17:41, 13 July 2022 (diff | hist) . . (+29) . . N J-Link ST SR5E1 series (Alex moved page J-Link ST SR5E1 series to J-Link ST SR5E1) (current) (Tag: New redirect)
- 17:41, 13 July 2022 (diff | hist) . . (-14) . . Debug Probes - J-Link & J-Trace (→ST)
- 17:40, 13 July 2022 (diff | hist) . . (+199) . . J-Link ST SR5E1
- 16:21, 13 July 2022 (diff | hist) . . (-1) . . DAP (→DAP topology examples =) (current)
- 16:19, 13 July 2022 (diff | hist) . . (0) . . DAP (→DAP topology example - Cascaded APs)
- 16:19, 13 July 2022 (diff | hist) . . (+467) . . DAP (→DAP topology examples)
- 16:19, 13 July 2022 (diff | hist) . . (0) . . N File:DAP CascadedAPs CortexM System.vsdx (current)
- 16:18, 13 July 2022 (diff | hist) . . (0) . . N File:DAP CascadedAPs CortexM System.png (current)
- 11:44, 12 July 2022 (diff | hist) . . (+1) . . Debug Probes - J-Link & J-Trace (→NXP)
- 11:43, 12 July 2022 (diff | hist) . . (+32) . . Debug Probes - J-Link & J-Trace (→NXP)
- 09:03, 12 July 2022 (diff | hist) . . (+3) . . N J-Link ST SR5E1 (Created page with "TBD")
- 09:02, 12 July 2022 (diff | hist) . . (+44) . . Debug Probes - J-Link & J-Trace (→Device specifics)
- 10:07, 7 July 2022 (diff | hist) . . (+6) . . J-Link-OB-K22-CortexM (→SN 900031732 to 900032331)
- 10:07, 7 July 2022 (diff | hist) . . (+155) . . J-Link-OB-K22-CortexM
- 10:05, 7 July 2022 (diff | hist) . . (+1) . . Debug Probes - J-Link & J-Trace (→J-Link model specifics)
- 10:05, 7 July 2022 (diff | hist) . . (0) . . N File:JLink-OB-K22-CortexM 900031732 to 900032331 VCOMPort.png (current)
- 10:05, 7 July 2022 (diff | hist) . . (0) . . N File:JLink-OB-K22-CortexM 900031732 to 900032331 AutoCorrect.png (current)
- 10:02, 7 July 2022 (diff | hist) . . (-11) . . J-Link-OB-K22-CortexM
- 10:00, 7 July 2022 (diff | hist) . . (+722) . . N J-Link-OB-K22-CortexM (Created page with "This article describes specifics of the J-Link OB CortexM (See https://www.segger.com/products/debug-probes/j-link/models/j-link-ob/#model-overview-supported-cores). __TOC__...")
- 09:14, 7 July 2022 (diff | hist) . . (+52) . . Debug Probes - J-Link & J-Trace (→J-Link model specifics)
- 09:45, 6 July 2022 (diff | hist) . . (+41) . . N J-Link Xtensa specifics (Created page with "__TOC__ TBD == Data breakpoints == TBD")
- 09:44, 6 July 2022 (diff | hist) . . (+39) . . Debug Probes - J-Link & J-Trace (→Core specifics)
- 17:01, 28 June 2022 (diff | hist) . . (+9) . . J-Link-OB-S124-Renesas (current)
- 17:00, 28 June 2022 (diff | hist) . . (+563) . . N J-Link-OB-S124-Renesas (Created page with "Several Renesas evaluation boards come with a J-Link-OB-S124-Renesas on them which allows out-of-the-box debugging on these boards without an external J-Link being connected....")
- 16:56, 28 June 2022 (diff | hist) . . (+54) . . Debug Probes - J-Link & J-Trace (→J-Link model specifics)
- 10:50, 21 June 2022 (diff | hist) . . (+1,000) . . J-Link cJTAG specifics
- 09:42, 2 June 2022 (diff | hist) . . (+659) . . N NXP MIMXRT685-EVK (Created page with "== J-Link OB == The NXP MIMXRT685-EVK comes with an LPC-Link2-on-board that can be reprogrammed via [https://www.nxp.com/lpcscrypt NXP LPCScrypt] to a J-Link OB. In order to...") (current)
- 09:38, 2 June 2022 (diff | hist) . . (+40) . . Debug Probes - J-Link & J-Trace (→NXP)
- 09:13, 9 May 2022 (diff | hist) . . (+8) . . SEGGER Flash Loader (→Open Flashloader)
- 09:12, 9 May 2022 (diff | hist) . . (+602) . . SEGGER Flash Loader (→Open Flashloader)
- 10:47, 3 May 2022 (diff | hist) . . (+404) . . N J-Link-OB-K22-NordicSemi (Created page with "This J-Link on-board (OB) is a special version of the J-Link OB that is mounted on many eval boards from Nordic Semiconductor. == WinUSB support == This J-Link OB only suppor...")
- 10:47, 3 May 2022 (diff | hist) . . (+58) . . Debug Probes - J-Link & J-Trace (→J-Link model specifics)
- 10:25, 3 May 2022 (diff | hist) . . (+404) . . N J-Link-OB-nRF5340-NordicSemi (Created page with "This J-Link on-board (OB) is a special version of the J-Link OB that is mounted on many eval boards from Nordic Semiconductor. == WinUSB support == This J-Link OB only suppor...")
- 10:24, 3 May 2022 (diff | hist) . . (+404) . . N J-Link-OB-SAM3U-NordicSemi (Created page with "This J-Link on-board (OB) is a special version of the J-Link OB that is mounted on many eval boards from Nordic Semiconductor. == WinUSB support == This J-Link OB only suppor...")
- 10:09, 3 May 2022 (diff | hist) . . (+128) . . Debug Probes - J-Link & J-Trace (→J-Link model specifics)
- 10:10, 17 December 2021 (diff | hist) . . (+161) . . J-Link on Windows ARM (→Requirements)
- 11:33, 9 December 2021 (diff | hist) . . (+9) . . emIDE (current)
- 18:30, 6 December 2021 (diff | hist) . . (+24) . . Delayed Program Start in Debug (→Problem) (current)
- 18:29, 6 December 2021 (diff | hist) . . (+1,087) . . Delayed Program Start in Debug (→Problem)
- 12:18, 29 November 2021 (diff | hist) . . (+1,041) . . N J-Link NEORV32 (Created page with "The [https://www.neorv32.org/ NEORV32] is an free and open-source RV32 based RISC-V CPU that is supported by J-Link. In addition to this article, the generic RISC-V specifics...") (current)
- 12:08, 29 November 2021 (diff | hist) . . (+31) . . Debug Probes - J-Link & J-Trace (→Core specifics)
- 12:18, 22 November 2021 (diff | hist) . . (0) . . N File:OFL Template CortexR QSPI.zip (current)
- 12:18, 22 November 2021 (diff | hist) . . (0) . . N File:OFL Template CortexM QSPI.zip (current)
- 12:18, 22 November 2021 (diff | hist) . . (0) . . N File:OFL Template CortexA QSPI.zip (current)
- 13:53, 19 November 2021 (diff | hist) . . (+1,162) . . N J-Link CoreSight (Created page with "CoreSight is a standard from ARM to describe debug components in a system and make them auto-detectable for the debug probe / debugger. CoreSight was introduced with the Corte...") (current)
- 13:43, 19 November 2021 (diff | hist) . . (+19) . . Debug Probes - J-Link & J-Trace (→J-Link software)
- 13:42, 19 November 2021 (diff | hist) . . (+31) . . Debug Probes - J-Link & J-Trace (→J-Link software)
- 11:17, 18 November 2021 (diff | hist) . . (-131) . . I.MX6DQ (→Multi-core support for iMX6DQ (DualCore / QuadCore Cortex-A9))
- 11:15, 18 November 2021 (diff | hist) . . (+130) . . I.MX6DQ (→Multi-core support for iMX6DQ (DualCore / QuadCore Cortex-A9))
- 11:13, 18 November 2021 (diff | hist) . . (0) . . File:NXP iMX6DQ Core3.JLinkScript (Alex uploaded a new version of File:NXP iMX6DQ Core3.JLinkScript) (current)
- 11:13, 18 November 2021 (diff | hist) . . (0) . . File:NXP iMX6DQ Core2.JLinkScript (Alex uploaded a new version of File:NXP iMX6DQ Core2.JLinkScript) (current)
- 11:13, 18 November 2021 (diff | hist) . . (0) . . File:NXP iMX6DQ Core1.JLinkScript (Alex uploaded a new version of File:NXP iMX6DQ Core1.JLinkScript) (current)
- 19:14, 12 November 2021 (diff | hist) . . (+2,542) . . N ROMTableScan (Created page with "For ARM CoreSight based systems, by default J-Link will scan the ROM table (and nested ones) to find CoreSight components like for example: * The core debug registers * An Emb...")
- 19:54, 28 October 2021 (diff | hist) . . (+11) . . Using J-Link via WiFi (→Via WiFi bridge)
- 19:54, 28 October 2021 (diff | hist) . . (-57) . . Using J-Link via WiFi (→Via J-Link Remote Server)
- 19:54, 28 October 2021 (diff | hist) . . (0) . . Using J-Link via WiFi (→J-Link BASE or higher)
- 19:53, 28 October 2021 (diff | hist) . . (+56) . . Using J-Link via WiFi (→J-Link PRO and J-Trace PRO (Cortex-M))
- 09:43, 16 September 2021 (diff | hist) . . (-2) . . Software and Hardware Features Overview (→Flasher)
- 09:38, 4 August 2021 (diff | hist) . . (+25) . . Enable J-Link log file (→Enable J-Link Log File)
- 14:43, 19 July 2021 (diff | hist) . . (0) . . Syntacore SCR3
- 14:42, 19 July 2021 (diff | hist) . . (+1,042) . . N Syntacore SCR3 (Created page with "The Syntacore SCR3 is a 32-bit (RV32) core, designed by [https://syntacore.com/page/products/processor-ip/scr3 Syntacore]. __TOC__ = Requirements = * A current J-Link model...")
- 14:42, 19 July 2021 (diff | hist) . . (+28) . . Debug Probes - J-Link & J-Trace (→Syntacore)
- 14:41, 19 July 2021 (diff | hist) . . (-41) . . Syntacore SCR1 (current)
- 14:41, 19 July 2021 (diff | hist) . . (+182) . . Syntacore SCR1
- 14:31, 30 June 2021 (diff | hist) . . (-96) . . Raspberry Pi RP2040 (→J-Link Support)
- 09:26, 30 June 2021 (diff | hist) . . (+70) . . RTT (→RISC-V specifics)
- 09:24, 30 June 2021 (diff | hist) . . (0) . . RTT
- 09:23, 30 June 2021 (diff | hist) . . (+1,322) . . RTT
- 09:05, 30 June 2021 (diff | hist) . . (+222) . . RTT
- 10:19, 15 June 2021 (diff | hist) . . (+26) . . Codasip L10 (current)
- 10:18, 15 June 2021 (diff | hist) . . (+641) . . N Codasip H50X (Created page with "The Codasip H50X is a 64-bit (RV64) core, designed by [https://codasip.com/products/codasip-risc-v-processors/ Codasip]. It is available in 2 variants: * H50X (no FPU) * H50XF...") (current)
- 10:17, 15 June 2021 (diff | hist) . . (+636) . . N Codasip L50 (Created page with "The Codasip L50 is a 32-bit (RV32) core, designed by [https://codasip.com/products/codasip-risc-v-processors/ Codasip]. It is available in 2 variants: * L50 (no FPU) * L50F (i...") (current)
- 10:17, 15 June 2021 (diff | hist) . . (+26) . . Codasip L30 (current)
- 10:15, 15 June 2021 (diff | hist) . . (+122) . . Debug Probes - J-Link & J-Trace (→Codasip)
- 14:37, 10 June 2021 (diff | hist) . . (-16) . . CloudBEAR BM-310 (current)
- 14:22, 10 June 2021 (diff | hist) . . (+538) . . N Codasip L10 (Created page with "The Codasip L10 is a 32-bit (RV32) core, designed by [https://codasip.com/products/codasip-risc-v-processors/ Codasip]. __TOC__ = Minimum required J-Link software version =...")
- 14:22, 10 June 2021 (diff | hist) . . (+610) . . N Codasip L30 (Created page with "The Codasip L30 is a 32-bit (RV32) core, designed by [https://codasip.com/products/codasip-risc-v-processors/ Codasip]. It is available in 2 variants: * L30 (no FPU) * L30F (i...")
- 14:20, 10 June 2021 (diff | hist) . . (+117) . . Debug Probes - J-Link & J-Trace (→CloudBEAR)
- 11:22, 10 June 2021 (diff | hist) . . (+2) . . Debug Probes - J-Link & J-Trace (→CloudBEAR)
- 11:21, 10 June 2021 (diff | hist) . . (+511) . . N CloudBEAR BM-610 (Created page with "The CloudBEAR BM-610 is a 64-bit (RV64) core, designed by [https://cloudbear.ru/products.html CloudBEAR]. __TOC__ = Minimum required J-Link software version = The BM-610 dev...") (current)